arch/powerpc/platforms/85xx/twr_p102x.c

Source file repositories/reference/linux-study-clean/arch/powerpc/platforms/85xx/twr_p102x.c

File Facts

System
Linux kernel
Corpus path
arch/powerpc/platforms/85xx/twr_p102x.c
Extension
.c
Size
2930 bytes
Lines
118
Domain
Architecture Layer
Bucket
arch/powerpc
Inferred role
Architecture Layer: implementation source
Status
source implementation candidate

Why This File Exists

CPU and platform-specific kernel glue: boot entry, traps, syscall entry, interrupts, page tables, context switch, and low-level barriers.

Dependency Surface

Detected Declarations

Annotated Snippet

if (np) {
			guts = of_iomap(np, 0);
			if (!guts)
				pr_err("twr_p1025: could not map global utilities register\n");
			else {
			/* P1025 has pins muxed for QE and other functions. To
			 * enable QE UEC mode, we need to set bit QE0 for UCC1
			 * in Eth mode, QE0 and QE3 for UCC5 in Eth mode, QE9
			 * and QE12 for QE MII management signals in PMUXCR
			 * register.
			 * Set QE mux bits in PMUXCR */
			setbits32(&guts->pmuxcr, MPC85xx_PMUXCR_QE(0) |
					MPC85xx_PMUXCR_QE(3) |
					MPC85xx_PMUXCR_QE(9) |
					MPC85xx_PMUXCR_QE(12));
			iounmap(guts);

#if IS_ENABLED(CONFIG_SERIAL_QE)
			/* On P1025TWR board, the UCC7 acted as UART port.
			 * However, The UCC7's CTS pin is low level in default,
			 * it will impact the transmission in full duplex
			 * communication. So disable the Flow control pin PA18.
			 * The UCC7 UART just can use RXD and TXD pins.
			 */
			par_io_config_pin(0, 18, 0, 0, 0, 0);
#endif
			/* Drive PB29 to CPLD low - CPLD will then change
			 * muxing from LBC to QE */
			par_io_config_pin(1, 29, 1, 0, 0, 0);
			par_io_data_set(1, 29, 0);
			}
			of_node_put(np);
		}
	}
#endif
#endif	/* CONFIG_QUICC_ENGINE */

	pr_info("TWR-P1025 board from Freescale Semiconductor\n");
}

machine_arch_initcall(twr_p1025, mpc85xx_common_publish_devices);

define_machine(twr_p1025) {
	.name			= "TWR-P1025",
	.compatible		= "fsl,TWR-P1025",
	.setup_arch		= twr_p1025_setup_arch,
	.init_IRQ		= twr_p1025_pic_init,
#ifdef CONFIG_PCI
	.pcibios_fixup_bus	= fsl_pcibios_fixup_bus,
#endif
	.get_irq		= mpic_get_irq,
	.progress		= udbg_progress,
};

Annotation

Implementation Notes