arch/powerpc/platforms/cell/spufs/spu_save.c
Source file repositories/reference/linux-study-clean/arch/powerpc/platforms/cell/spufs/spu_save.c
File Facts
- System
- Linux kernel
- Corpus path
arch/powerpc/platforms/cell/spufs/spu_save.c- Extension
.c- Size
- 4323 bytes
- Lines
- 182
- Domain
- Architecture Layer
- Bucket
- arch/powerpc
- Inferred role
- Architecture Layer: implementation source
- Status
- source implementation candidate
Why This File Exists
CPU and platform-specific kernel glue: boot entry, traps, syscall entry, interrupts, page tables, context switch, and low-level barriers.
- CPU and platform-specific kernel glue: boot entry, traps, syscall entry, interrupts, page tables, context switch, and low-level barriers.
Dependency Surface
spu_intrinsics.hasm/spu_csa.hspu_utils.h
Detected Declarations
function save_event_maskfunction save_tag_maskfunction save_upper_240kbfunction save_fpcrfunction save_decrfunction save_srr0function spill_regs_to_memfunction enqueue_syncfunction save_completefunction main
Annotated Snippet
// SPDX-License-Identifier: GPL-2.0-or-later
/*
* spu_save.c
*
* (C) Copyright IBM Corp. 2005
*
* SPU-side context save sequence outlined in
* Synergistic Processor Element Book IV
*
* Author: Mark Nutter <mnutter@us.ibm.com>
*/
#ifndef LS_SIZE
#define LS_SIZE 0x40000 /* 256K (in bytes) */
#endif
typedef unsigned int u32;
typedef unsigned long long u64;
#include <spu_intrinsics.h>
#include <asm/spu_csa.h>
#include "spu_utils.h"
static inline void save_event_mask(void)
{
unsigned int offset;
/* Save, Step 2:
* Read the SPU_RdEventMsk channel and save to the LSCSA.
*/
offset = LSCSA_QW_OFFSET(event_mask);
regs_spill[offset].slot[0] = spu_readch(SPU_RdEventMask);
}
static inline void save_tag_mask(void)
{
unsigned int offset;
/* Save, Step 3:
* Read the SPU_RdTagMsk channel and save to the LSCSA.
*/
offset = LSCSA_QW_OFFSET(tag_mask);
regs_spill[offset].slot[0] = spu_readch(MFC_RdTagMask);
}
static inline void save_upper_240kb(addr64 lscsa_ea)
{
unsigned int ls = 16384;
unsigned int list = (unsigned int)&dma_list[0];
unsigned int size = sizeof(dma_list);
unsigned int tag_id = 0;
unsigned int cmd = 0x24; /* PUTL */
/* Save, Step 7:
* Enqueue the PUTL command (tag 0) to the MFC SPU command
* queue to transfer the remaining 240 kb of LS to CSA.
*/
spu_writech(MFC_LSA, ls);
spu_writech(MFC_EAH, lscsa_ea.ui[0]);
spu_writech(MFC_EAL, list);
spu_writech(MFC_Size, size);
spu_writech(MFC_TagID, tag_id);
spu_writech(MFC_Cmd, cmd);
}
static inline void save_fpcr(void)
{
// vector unsigned int fpcr;
unsigned int offset;
/* Save, Step 9:
* Issue the floating-point status and control register
* read instruction, and save to the LSCSA.
*/
offset = LSCSA_QW_OFFSET(fpcr);
regs_spill[offset].v = spu_mffpscr();
}
static inline void save_decr(void)
{
unsigned int offset;
/* Save, Step 10:
* Read and save the SPU_RdDec channel data to
* the LSCSA.
*/
offset = LSCSA_QW_OFFSET(decr);
regs_spill[offset].slot[0] = spu_readch(SPU_RdDec);
}
Annotation
- Immediate include surface: `spu_intrinsics.h`, `asm/spu_csa.h`, `spu_utils.h`.
- Detected declarations: `function save_event_mask`, `function save_tag_mask`, `function save_upper_240kb`, `function save_fpcr`, `function save_decr`, `function save_srr0`, `function spill_regs_to_mem`, `function enqueue_sync`, `function save_complete`, `function main`.
- Atlas domain: Architecture Layer / arch/powerpc.
- Implementation status: source implementation candidate.
Implementation Notes
- This generated page is the file-by-file coverage layer; curated subsystem chapters should link here when they synthesize a multi-file control flow.
- Core OS pages should be promoted from atlas-only to deep-reviewed when they explain data structures, invariants, locking, lifecycle, and C implementation snippets.
- Driver-family pages are intentionally pattern-oriented unless they are part of the selected PCIe/NVMe representative device path.