arch/powerpc/platforms/chrp/setup.c
Source file repositories/reference/linux-study-clean/arch/powerpc/platforms/chrp/setup.c
File Facts
- System
- Linux kernel
- Corpus path
arch/powerpc/platforms/chrp/setup.c- Extension
.c- Size
- 14451 bytes
- Lines
- 587
- Domain
- Architecture Layer
- Bucket
- arch/powerpc
- Inferred role
- Architecture Layer: exported/initcall integration point
- Status
- integration implementation candidate
Why This File Exists
CPU and platform-specific kernel glue: boot entry, traps, syscall entry, interrupts, page tables, context switch, and low-level barriers.
- CPU and platform-specific kernel glue: boot entry, traps, syscall entry, interrupts, page tables, context switch, and low-level barriers.
- Exports symbols or registers init work; inspect boot/module ordering and who consumes the exported contract.
- Touches IRQ or DMA behavior; this matters for the representative real-device path.
- Defines or uses C structs; map object ownership, embedded links, reference counts, and lock ownership.
Dependency Surface
linux/errno.hlinux/sched.hlinux/kernel.hlinux/mm.hlinux/stddef.hlinux/unistd.hlinux/ptrace.hlinux/user.hlinux/tty.hlinux/major.hlinux/interrupt.hlinux/reboot.hlinux/init.hlinux/pci.hgenerated/utsrelease.hlinux/adb.hlinux/module.hlinux/delay.hlinux/console.hlinux/seq_file.hlinux/root_dev.hlinux/initrd.hlinux/timer.hlinux/of_address.hlinux/of_fdt.hlinux/of_irq.hasm/io.hasm/pci-bridge.hasm/dma.hasm/machdep.hasm/irq.hasm/hydra.h
Detected Declarations
function chrp_show_cpuinfofunction sio_writefunction sio_readfunction sio_fixup_irqfunction sio_initfunction pegasos_set_l2crfunction briq_restartfunction chrp_initfunction chrp_setup_archfunction chrp_8259_cascadefunction chrp_find_openpicfunction chrp_find_8259function chrp_init_IRQfunction chrp_init2function chrp_probeexport _chrp_type
Annotated Snippet
switch ((t>>8) & 0x1f) {
case 0x1f:
model = "4 MB";
break;
case 0x1e:
model = "8 MB";
break;
case 0x1c:
model = "16 MB";
break;
case 0x18:
model = "32 MB";
break;
case 0x10:
model = "64 MB";
break;
case 0x00:
model = "128 MB";
break;
default:
model = "Reserved";
break;
}
seq_printf(m, "memory bank %d\t: %s %s\n", i, model,
gg2_memtypes[sdramen ? 1 : ((t>>1) & 3)]);
}
/* L2 cache */
t = in_le32(gg2_pci_config_base+GG2_PCI_CC_CTRL);
seq_printf(m, "board l2\t: %s %s (%s)\n",
gg2_cachesizes[(t>>7) & 3],
gg2_cachetypes[(t>>2) & 3],
gg2_cachemodes[t & 3]);
}
of_node_put(root);
}
/*
* Fixes for the National Semiconductor PC78308VUL SuperI/O
*
* Some versions of Open Firmware incorrectly initialize the IRQ settings
* for keyboard and mouse
*/
static inline void __init sio_write(u8 val, u8 index)
{
outb(index, 0x15c);
outb(val, 0x15d);
}
static inline u8 __init sio_read(u8 index)
{
outb(index, 0x15c);
return inb(0x15d);
}
static void __init sio_fixup_irq(const char *name, u8 device, u8 level,
u8 type)
{
u8 level0, type0, active;
/* select logical device */
sio_write(device, 0x07);
active = sio_read(0x30);
level0 = sio_read(0x70);
type0 = sio_read(0x71);
if (level0 != level || type0 != type || !active) {
printk(KERN_WARNING "sio: %s irq level %d, type %d, %sactive: "
"remapping to level %d, type %d, active\n",
name, level0, type0, !active ? "in" : "", level, type);
sio_write(0x01, 0x30);
sio_write(level, 0x70);
sio_write(type, 0x71);
}
}
static void __init sio_init(void)
{
struct device_node *root;
const char *model;
root = of_find_node_by_path("/");
if (!root)
return;
model = of_get_property(root, "model", NULL);
if (model && !strncmp(model, "IBM,LongTrail", 13)) {
/* logical device 0 (KBC/Keyboard) */
sio_fixup_irq("keyboard", 0, 1, 2);
/* select logical device 1 (KBC/Mouse) */
sio_fixup_irq("mouse", 1, 12, 2);
}
Annotation
- Immediate include surface: `linux/errno.h`, `linux/sched.h`, `linux/kernel.h`, `linux/mm.h`, `linux/stddef.h`, `linux/unistd.h`, `linux/ptrace.h`, `linux/user.h`.
- Detected declarations: `function chrp_show_cpuinfo`, `function sio_write`, `function sio_read`, `function sio_fixup_irq`, `function sio_init`, `function pegasos_set_l2cr`, `function briq_restart`, `function chrp_init`, `function chrp_setup_arch`, `function chrp_8259_cascade`.
- Atlas domain: Architecture Layer / arch/powerpc.
- Implementation status: integration implementation candidate.
- IRQ or DMA behavior appears here, which is relevant to the selected PCIe/NVMe device path.
Implementation Notes
- This generated page is the file-by-file coverage layer; curated subsystem chapters should link here when they synthesize a multi-file control flow.
- Core OS pages should be promoted from atlas-only to deep-reviewed when they explain data structures, invariants, locking, lifecycle, and C implementation snippets.
- Driver-family pages are intentionally pattern-oriented unless they are part of the selected PCIe/NVMe representative device path.