arch/powerpc/platforms/powermac/pfunc_base.c
Source file repositories/reference/linux-study-clean/arch/powerpc/platforms/powermac/pfunc_base.c
File Facts
- System
- Linux kernel
- Corpus path
arch/powerpc/platforms/powermac/pfunc_base.c- Extension
.c- Size
- 10324 bytes
- Lines
- 413
- Domain
- Architecture Layer
- Bucket
- arch/powerpc
- Inferred role
- Architecture Layer: implementation source
- Status
- source implementation candidate
Why This File Exists
CPU and platform-specific kernel glue: boot entry, traps, syscall entry, interrupts, page tables, context switch, and low-level barriers.
- CPU and platform-specific kernel glue: boot entry, traps, syscall entry, interrupts, page tables, context switch, and low-level barriers.
- Uses kernel synchronization; read lock ordering, sleepability, and interrupt context assumptions before translating.
- Touches IRQ or DMA behavior; this matters for the representative real-device path.
- Defines or uses C structs; map object ownership, embedded links, reference counts, and lock ownership.
Dependency Surface
linux/types.hlinux/init.hlinux/delay.hlinux/kernel.hlinux/interrupt.hlinux/spinlock.hlinux/of_irq.hasm/pmac_feature.hasm/pmac_pfunc.h
Detected Declarations
function macio_gpio_irqfunction macio_do_gpio_irq_enablefunction macio_do_gpio_irq_disablefunction macio_do_gpio_writefunction macio_do_gpio_readfunction macio_do_delayfunction macio_gpio_init_onefunction macio_do_write_reg32function macio_do_read_reg32function macio_do_write_reg8function macio_do_read_reg8function macio_do_read_reg32_msrxfunction macio_do_read_reg8_msrxfunction macio_do_write_reg32_slmfunction macio_do_write_reg8_slmfunction macio_mmio_init_onefunction unin_do_write_reg32function uninorth_install_pfuncfunction pmac_pfunc_base_installfunction pmac_pfunc_base_suspendfunction pmac_pfunc_base_resume
Annotated Snippet
if (of_node_name_eq(np, "hw-clock")) {
unin_hwclock = np;
break;
}
if (unin_hwclock) {
DBG("Installing functions for UniN clock %pOF\n",
unin_hwclock);
pmf_register_driver(unin_hwclock, &unin_mmio_handlers, NULL);
pmf_do_functions(unin_hwclock, NULL, 0, PMF_FLAGS_ON_INIT,
NULL);
}
}
/* We export this as the SMP code might init us early */
int __init pmac_pfunc_base_install(void)
{
static int pfbase_inited;
int i;
if (pfbase_inited)
return 0;
pfbase_inited = 1;
if (!machine_is(powermac))
return 0;
DBG("Installing base platform functions...\n");
/*
* Locate mac-io chips and install handlers
*/
for (i = 0 ; i < MAX_MACIO_CHIPS; i++) {
if (macio_chips[i].of_node) {
macio_mmio_init_one(&macio_chips[i]);
macio_gpio_init_one(&macio_chips[i]);
}
}
/*
* Install handlers for northbridge and direct mapped hwclock
* if any. We do not implement the config space access callback
* which is only ever used for functions that we do not call in
* the current driver (enabling/disabling cells in U2, mostly used
* to restore the PCI settings, we do that differently)
*/
if (uninorth_node && uninorth_base)
uninorth_install_pfunc();
DBG("All base functions installed\n");
return 0;
}
machine_arch_initcall(powermac, pmac_pfunc_base_install);
#ifdef CONFIG_PM
/* Those can be called by pmac_feature. Ultimately, I should use a sysdev
* or a device, but for now, that's good enough until I sort out some
* ordering issues. Also, we do not bother with GPIOs, as so far I yet have
* to see a case where a GPIO function has the on-suspend or on-resume bit
*/
void pmac_pfunc_base_suspend(void)
{
int i;
for (i = 0 ; i < MAX_MACIO_CHIPS; i++) {
if (macio_chips[i].of_node)
pmf_do_functions(macio_chips[i].of_node, NULL, 0,
PMF_FLAGS_ON_SLEEP, NULL);
}
if (uninorth_node)
pmf_do_functions(uninorth_node, NULL, 0,
PMF_FLAGS_ON_SLEEP, NULL);
if (unin_hwclock)
pmf_do_functions(unin_hwclock, NULL, 0,
PMF_FLAGS_ON_SLEEP, NULL);
}
void pmac_pfunc_base_resume(void)
{
int i;
if (unin_hwclock)
pmf_do_functions(unin_hwclock, NULL, 0,
PMF_FLAGS_ON_WAKE, NULL);
if (uninorth_node)
pmf_do_functions(uninorth_node, NULL, 0,
PMF_FLAGS_ON_WAKE, NULL);
for (i = 0 ; i < MAX_MACIO_CHIPS; i++) {
if (macio_chips[i].of_node)
Annotation
- Immediate include surface: `linux/types.h`, `linux/init.h`, `linux/delay.h`, `linux/kernel.h`, `linux/interrupt.h`, `linux/spinlock.h`, `linux/of_irq.h`, `asm/pmac_feature.h`.
- Detected declarations: `function macio_gpio_irq`, `function macio_do_gpio_irq_enable`, `function macio_do_gpio_irq_disable`, `function macio_do_gpio_write`, `function macio_do_gpio_read`, `function macio_do_delay`, `function macio_gpio_init_one`, `function macio_do_write_reg32`, `function macio_do_read_reg32`, `function macio_do_write_reg8`.
- Atlas domain: Architecture Layer / arch/powerpc.
- Implementation status: source implementation candidate.
- Synchronization appears in or near this file; preserve lock ordering, sleepability, and interrupt-context constraints.
- IRQ or DMA behavior appears here, which is relevant to the selected PCIe/NVMe device path.
Implementation Notes
- This generated page is the file-by-file coverage layer; curated subsystem chapters should link here when they synthesize a multi-file control flow.
- Core OS pages should be promoted from atlas-only to deep-reviewed when they explain data structures, invariants, locking, lifecycle, and C implementation snippets.
- Driver-family pages are intentionally pattern-oriented unless they are part of the selected PCIe/NVMe representative device path.