arch/powerpc/platforms/powernv/opal-irqchip.c
Source file repositories/reference/linux-study-clean/arch/powerpc/platforms/powernv/opal-irqchip.c
File Facts
- System
- Linux kernel
- Corpus path
arch/powerpc/platforms/powernv/opal-irqchip.c- Extension
.c- Size
- 7988 bytes
- Lines
- 315
- Domain
- Architecture Layer
- Bucket
- arch/powerpc
- Inferred role
- Architecture Layer: exported/initcall integration point
- Status
- integration implementation candidate
Why This File Exists
CPU and platform-specific kernel glue: boot entry, traps, syscall entry, interrupts, page tables, context switch, and low-level barriers.
- CPU and platform-specific kernel glue: boot entry, traps, syscall entry, interrupts, page tables, context switch, and low-level barriers.
- Exports symbols or registers init work; inspect boot/module ordering and who consumes the exported contract.
- Touches IRQ or DMA behavior; this matters for the representative real-device path.
- Allocates kernel memory; connect allocation flags and lifetime to context constraints.
- Defines or uses C structs; map object ownership, embedded links, reference counts, and lock ownership.
Dependency Surface
linux/bitops.hlinux/irq.hlinux/irqchip.hlinux/irqdomain.hlinux/interrupt.hlinux/module.hlinux/of.hlinux/platform_device.hlinux/kthread.hlinux/delay.hlinux/slab.hlinux/of_irq.hasm/machdep.hasm/opal.hpowernv.h
Detected Declarations
struct opal_event_irqchipfunction opal_handle_eventsfunction opal_have_pending_eventsfunction opal_event_maskfunction opal_event_unmaskfunction opal_event_set_typefunction opal_event_mapfunction opal_interruptfunction opal_event_matchfunction opal_event_xlatefunction opal_event_shutdownfunction opal_event_initfunction opal_event_requestexport opal_event_request
Annotated Snippet
struct opal_event_irqchip {
struct irq_chip irqchip;
struct irq_domain *domain;
unsigned long mask;
};
static struct opal_event_irqchip opal_event_irqchip;
static u64 last_outstanding_events;
static int opal_irq_count;
static struct resource *opal_irqs;
void opal_handle_events(void)
{
__be64 events = 0;
u64 e;
e = READ_ONCE(last_outstanding_events) & opal_event_irqchip.mask;
again:
while (e) {
int hwirq;
hwirq = fls64(e) - 1;
e &= ~BIT_ULL(hwirq);
local_irq_disable();
irq_enter();
generic_handle_domain_irq(opal_event_irqchip.domain, hwirq);
irq_exit();
local_irq_enable();
cond_resched();
}
WRITE_ONCE(last_outstanding_events, 0);
if (opal_poll_events(&events) != OPAL_SUCCESS)
return;
e = be64_to_cpu(events) & opal_event_irqchip.mask;
if (e)
goto again;
}
bool opal_have_pending_events(void)
{
if (READ_ONCE(last_outstanding_events) & opal_event_irqchip.mask)
return true;
return false;
}
static void opal_event_mask(struct irq_data *d)
{
clear_bit(d->hwirq, &opal_event_irqchip.mask);
}
static void opal_event_unmask(struct irq_data *d)
{
set_bit(d->hwirq, &opal_event_irqchip.mask);
if (opal_have_pending_events())
opal_wake_poller();
}
static int opal_event_set_type(struct irq_data *d, unsigned int flow_type)
{
/*
* For now we only support level triggered events. The irq
* handler will be called continuously until the event has
* been cleared in OPAL.
*/
if (flow_type != IRQ_TYPE_LEVEL_HIGH)
return -EINVAL;
return 0;
}
static struct opal_event_irqchip opal_event_irqchip = {
.irqchip = {
.name = "OPAL EVT",
.irq_mask = opal_event_mask,
.irq_unmask = opal_event_unmask,
.irq_set_type = opal_event_set_type,
},
.mask = 0,
};
static int opal_event_map(struct irq_domain *d, unsigned int irq,
irq_hw_number_t hwirq)
{
irq_set_chip_data(irq, &opal_event_irqchip);
irq_set_chip_and_handler(irq, &opal_event_irqchip.irqchip,
handle_level_irq);
return 0;
}
Annotation
- Immediate include surface: `linux/bitops.h`, `linux/irq.h`, `linux/irqchip.h`, `linux/irqdomain.h`, `linux/interrupt.h`, `linux/module.h`, `linux/of.h`, `linux/platform_device.h`.
- Detected declarations: `struct opal_event_irqchip`, `function opal_handle_events`, `function opal_have_pending_events`, `function opal_event_mask`, `function opal_event_unmask`, `function opal_event_set_type`, `function opal_event_map`, `function opal_interrupt`, `function opal_event_match`, `function opal_event_xlate`.
- Atlas domain: Architecture Layer / arch/powerpc.
- Implementation status: integration implementation candidate.
- IRQ or DMA behavior appears here, which is relevant to the selected PCIe/NVMe device path.
Implementation Notes
- This generated page is the file-by-file coverage layer; curated subsystem chapters should link here when they synthesize a multi-file control flow.
- Core OS pages should be promoted from atlas-only to deep-reviewed when they explain data structures, invariants, locking, lifecycle, and C implementation snippets.
- Driver-family pages are intentionally pattern-oriented unless they are part of the selected PCIe/NVMe representative device path.