arch/powerpc/platforms/powernv/opal-powercap.c
Source file repositories/reference/linux-study-clean/arch/powerpc/platforms/powernv/opal-powercap.c
File Facts
- System
- Linux kernel
- Corpus path
arch/powerpc/platforms/powernv/opal-powercap.c- Extension
.c- Size
- 5280 bytes
- Lines
- 245
- Domain
- Architecture Layer
- Bucket
- arch/powerpc
- Inferred role
- Architecture Layer: implementation source
- Status
- source implementation candidate
Why This File Exists
CPU and platform-specific kernel glue: boot entry, traps, syscall entry, interrupts, page tables, context switch, and low-level barriers.
- CPU and platform-specific kernel glue: boot entry, traps, syscall entry, interrupts, page tables, context switch, and low-level barriers.
- Uses kernel synchronization; read lock ordering, sleepability, and interrupt context assumptions before translating.
- Allocates kernel memory; connect allocation flags and lifetime to context constraints.
- Defines or uses C structs; map object ownership, embedded links, reference counts, and lock ownership.
Dependency Surface
linux/of.hlinux/kobject.hlinux/slab.hlinux/sysfs.hasm/opal.h
Detected Declarations
struct powercap_attrfunction powercap_showfunction powercap_storefunction powercap_add_attrfunction opal_powercap_init
Annotated Snippet
struct powercap_attr {
u32 handle;
struct kobj_attribute attr;
};
static struct pcap {
struct attribute_group pg;
struct powercap_attr *pattrs;
} *pcaps;
static ssize_t powercap_show(struct kobject *kobj, struct kobj_attribute *attr,
char *buf)
{
struct powercap_attr *pcap_attr = container_of(attr,
struct powercap_attr, attr);
struct opal_msg msg;
u32 pcap;
int ret, token;
token = opal_async_get_token_interruptible();
if (token < 0) {
pr_devel("Failed to get token\n");
return token;
}
ret = mutex_lock_interruptible(&powercap_mutex);
if (ret)
goto out_token;
ret = opal_get_powercap(pcap_attr->handle, token, (u32 *)__pa(&pcap));
switch (ret) {
case OPAL_ASYNC_COMPLETION:
ret = opal_async_wait_response(token, &msg);
if (ret) {
pr_devel("Failed to wait for the async response\n");
ret = -EIO;
goto out;
}
ret = opal_error_code(opal_get_async_rc(msg));
if (!ret)
ret = sysfs_emit(buf, "%u\n", be32_to_cpu(pcap));
break;
case OPAL_SUCCESS:
ret = sysfs_emit(buf, "%u\n", be32_to_cpu(pcap));
break;
default:
ret = opal_error_code(ret);
}
out:
mutex_unlock(&powercap_mutex);
out_token:
opal_async_release_token(token);
return ret;
}
static ssize_t powercap_store(struct kobject *kobj,
struct kobj_attribute *attr, const char *buf,
size_t count)
{
struct powercap_attr *pcap_attr = container_of(attr,
struct powercap_attr, attr);
struct opal_msg msg;
u32 pcap;
int ret, token;
ret = kstrtoint(buf, 0, &pcap);
if (ret)
return ret;
token = opal_async_get_token_interruptible();
if (token < 0) {
pr_devel("Failed to get token\n");
return token;
}
ret = mutex_lock_interruptible(&powercap_mutex);
if (ret)
goto out_token;
ret = opal_set_powercap(pcap_attr->handle, token, pcap);
switch (ret) {
case OPAL_ASYNC_COMPLETION:
ret = opal_async_wait_response(token, &msg);
if (ret) {
pr_devel("Failed to wait for the async response\n");
ret = -EIO;
goto out;
}
ret = opal_error_code(opal_get_async_rc(msg));
Annotation
- Immediate include surface: `linux/of.h`, `linux/kobject.h`, `linux/slab.h`, `linux/sysfs.h`, `asm/opal.h`.
- Detected declarations: `struct powercap_attr`, `function powercap_show`, `function powercap_store`, `function powercap_add_attr`, `function opal_powercap_init`.
- Atlas domain: Architecture Layer / arch/powerpc.
- Implementation status: source implementation candidate.
- Synchronization appears in or near this file; preserve lock ordering, sleepability, and interrupt-context constraints.
Implementation Notes
- This generated page is the file-by-file coverage layer; curated subsystem chapters should link here when they synthesize a multi-file control flow.
- Core OS pages should be promoted from atlas-only to deep-reviewed when they explain data structures, invariants, locking, lifecycle, and C implementation snippets.
- Driver-family pages are intentionally pattern-oriented unless they are part of the selected PCIe/NVMe representative device path.