arch/powerpc/platforms/ps3/hvcall.S
Source file repositories/reference/linux-study-clean/arch/powerpc/platforms/ps3/hvcall.S
File Facts
- System
- Linux kernel
- Corpus path
arch/powerpc/platforms/ps3/hvcall.S- Extension
.S- Size
- 16973 bytes
- Lines
- 829
- Domain
- Architecture Layer
- Bucket
- arch/powerpc
- Inferred role
- Architecture Layer: arch/powerpc
- Status
- atlas-only
Why This File Exists
CPU and platform-specific kernel glue: boot entry, traps, syscall entry, interrupts, page tables, context switch, and low-level barriers.
- CPU and platform-specific kernel glue: boot entry, traps, syscall entry, interrupts, page tables, context switch, and low-level barriers.
Dependency Surface
asm/processor.hasm/ppc_asm.hasm/ptrace.hasm/lv1call.h
Detected Declarations
- No top-level syscall, struct, function, initcall, or export declaration detected by the generator.
Annotated Snippet
#include <asm/processor.h>
#include <asm/ppc_asm.h>
#include <asm/ptrace.h>
#define lv1call .long 0x44000022; extsw r3, r3
#define LV1_N_IN_0_OUT(API_NAME, API_NUMBER) \
_GLOBAL(_##API_NAME) \
\
mflr r0; \
std r0, LRSAVE(r1); \
\
stdu r1, -STACK_FRAME_MIN_SIZE(r1); \
li r11, API_NUMBER; \
lv1call; \
addi r1, r1, STACK_FRAME_MIN_SIZE; \
\
ld r0, LRSAVE(r1); \
mtlr r0; \
blr
#define LV1_0_IN_0_OUT LV1_N_IN_0_OUT
#define LV1_1_IN_0_OUT LV1_N_IN_0_OUT
#define LV1_2_IN_0_OUT LV1_N_IN_0_OUT
#define LV1_3_IN_0_OUT LV1_N_IN_0_OUT
#define LV1_4_IN_0_OUT LV1_N_IN_0_OUT
#define LV1_5_IN_0_OUT LV1_N_IN_0_OUT
#define LV1_6_IN_0_OUT LV1_N_IN_0_OUT
#define LV1_7_IN_0_OUT LV1_N_IN_0_OUT
#define LV1_0_IN_1_OUT(API_NAME, API_NUMBER) \
_GLOBAL(_##API_NAME) \
\
mflr r0; \
std r0, LRSAVE(r1); \
\
std r3, -8(r1); \
stdu r1, -STACK_FRAME_MIN_SIZE-8(r1); \
\
li r11, API_NUMBER; \
lv1call; \
\
addi r1, r1, STACK_FRAME_MIN_SIZE+8; \
ld r11, -8(r1); \
std r4, 0(r11); \
\
ld r0, LRSAVE(r1); \
mtlr r0; \
blr
#define LV1_0_IN_2_OUT(API_NAME, API_NUMBER) \
_GLOBAL(_##API_NAME) \
\
mflr r0; \
std r0, LRSAVE(r1); \
\
std r3, -8(r1); \
std r4, -16(r1); \
stdu r1, -STACK_FRAME_MIN_SIZE-16(r1); \
\
li r11, API_NUMBER; \
lv1call; \
\
addi r1, r1, STACK_FRAME_MIN_SIZE+16; \
ld r11, -8(r1); \
std r4, 0(r11); \
ld r11, -16(r1); \
std r5, 0(r11); \
\
ld r0, LRSAVE(r1); \
Annotation
- Immediate include surface: `asm/processor.h`, `asm/ppc_asm.h`, `asm/ptrace.h`, `asm/lv1call.h`.
- Atlas domain: Architecture Layer / arch/powerpc.
- Implementation status: atlas-only.
Implementation Notes
- This generated page is the file-by-file coverage layer; curated subsystem chapters should link here when they synthesize a multi-file control flow.
- Core OS pages should be promoted from atlas-only to deep-reviewed when they explain data structures, invariants, locking, lifecycle, and C implementation snippets.
- Driver-family pages are intentionally pattern-oriented unless they are part of the selected PCIe/NVMe representative device path.