arch/powerpc/platforms/pseries/eeh_pseries.c
Source file repositories/reference/linux-study-clean/arch/powerpc/platforms/pseries/eeh_pseries.c
File Facts
- System
- Linux kernel
- Corpus path
arch/powerpc/platforms/pseries/eeh_pseries.c- Extension
.c- Size
- 25323 bytes
- Lines
- 927
- Domain
- Architecture Layer
- Bucket
- arch/powerpc
- Inferred role
- Architecture Layer: exported/initcall integration point
- Status
- integration implementation candidate
Why This File Exists
CPU and platform-specific kernel glue: boot entry, traps, syscall entry, interrupts, page tables, context switch, and low-level barriers.
- CPU and platform-specific kernel glue: boot entry, traps, syscall entry, interrupts, page tables, context switch, and low-level barriers.
- Exports symbols or registers init work; inspect boot/module ordering and who consumes the exported contract.
- Uses kernel synchronization; read lock ordering, sleepability, and interrupt context assumptions before translating.
- Allocates kernel memory; connect allocation flags and lifetime to context constraints.
- Defines or uses C structs; map object ownership, embedded links, reference counts, and lock ownership.
Dependency Surface
linux/atomic.hlinux/delay.hlinux/export.hlinux/init.hlinux/list.hlinux/of.hlinux/pci.hlinux/proc_fs.hlinux/rbtree.hlinux/sched.hlinux/seq_file.hlinux/spinlock.hlinux/crash_dump.hasm/eeh.hasm/eeh_event.hasm/io.hasm/machdep.hasm/ppc-pci.hasm/rtas.h
Detected Declarations
function pseries_pcibios_bus_add_devicefunction pseries_eeh_get_pe_config_addrfunction pseries_eeh_phb_resetfunction pseries_eeh_phb_configure_bridgefunction pseries_eeh_cap_startfunction pseries_eeh_find_capfunction pseries_eeh_find_ecapfunction pseries_eeh_init_edevfunction bootfunction pseries_eeh_set_optionfunction pseries_eeh_get_statefunction pseries_eeh_resetfunction pseries_eeh_get_logfunction pseries_eeh_configure_bridgefunction pseries_eeh_read_configfunction pseries_eeh_write_configfunction pseries_send_allow_unfreezefunction pseries_call_allow_unfreezefunction list_for_each_entry_safefunction pseries_notify_resumefunction pseries_eeh_err_injectfunction eeh_pseries_initfunction list_for_each_entryexport pseries_eeh_init_edev_recursive
Annotated Snippet
if (ret) {
pr_warn("%s: Failed to get address for PHB#%x-PE#%x\n",
__func__, phb->global_number, config_addr);
return -ENXIO;
}
return rets[0];
}
if (ibm_get_config_addr_info != RTAS_UNKNOWN_SERVICE) {
ret = rtas_call(ibm_get_config_addr_info, 4, 2, rets,
config_addr, BUID_HI(phb->buid),
BUID_LO(phb->buid), 0);
if (ret) {
pr_warn("%s: Failed to get address for PHB#%x-PE#%x\n",
__func__, phb->global_number, config_addr);
return -ENXIO;
}
return rets[0];
}
/*
* PAPR does describe a process for finding the pe_config_addr that was
* used before the ibm,get-config-addr-info calls were added. However,
* I haven't found *any* systems that don't have that RTAS call
* implemented. If you happen to find one that needs the old DT based
* process, patches are welcome!
*/
return -ENOENT;
}
/**
* pseries_eeh_phb_reset - Reset the specified PHB
* @phb: PCI controller
* @config_addr: the associated config address
* @option: reset option
*
* Reset the specified PHB/PE
*/
static int pseries_eeh_phb_reset(struct pci_controller *phb, int config_addr, int option)
{
int ret;
/* Reset PE through RTAS call */
ret = rtas_call(ibm_set_slot_reset, 4, 1, NULL,
config_addr, BUID_HI(phb->buid),
BUID_LO(phb->buid), option);
/* If fundamental-reset not supported, try hot-reset */
if (option == EEH_RESET_FUNDAMENTAL && ret == -8) {
option = EEH_RESET_HOT;
ret = rtas_call(ibm_set_slot_reset, 4, 1, NULL,
config_addr, BUID_HI(phb->buid),
BUID_LO(phb->buid), option);
}
/* We need reset hold or settlement delay */
if (option == EEH_RESET_FUNDAMENTAL || option == EEH_RESET_HOT)
msleep(EEH_PE_RST_HOLD_TIME);
else
msleep(EEH_PE_RST_SETTLE_TIME);
return ret;
}
/**
* pseries_eeh_phb_configure_bridge - Configure PCI bridges in the indicated PE
* @phb: PCI controller
* @config_addr: the associated config address
*
* The function will be called to reconfigure the bridges included
* in the specified PE so that the mulfunctional PE would be recovered
* again.
*/
static int pseries_eeh_phb_configure_bridge(struct pci_controller *phb, int config_addr)
{
int ret;
/* Waiting 0.2s maximum before skipping configuration */
int max_wait = 200;
while (max_wait > 0) {
ret = rtas_call(ibm_configure_pe, 3, 1, NULL,
config_addr, BUID_HI(phb->buid),
BUID_LO(phb->buid));
if (!ret)
return ret;
if (ret < 0)
break;
Annotation
- Immediate include surface: `linux/atomic.h`, `linux/delay.h`, `linux/export.h`, `linux/init.h`, `linux/list.h`, `linux/of.h`, `linux/pci.h`, `linux/proc_fs.h`.
- Detected declarations: `function pseries_pcibios_bus_add_device`, `function pseries_eeh_get_pe_config_addr`, `function pseries_eeh_phb_reset`, `function pseries_eeh_phb_configure_bridge`, `function pseries_eeh_cap_start`, `function pseries_eeh_find_cap`, `function pseries_eeh_find_ecap`, `function pseries_eeh_init_edev`, `function boot`, `function pseries_eeh_set_option`.
- Atlas domain: Architecture Layer / arch/powerpc.
- Implementation status: integration implementation candidate.
- Synchronization appears in or near this file; preserve lock ordering, sleepability, and interrupt-context constraints.
Implementation Notes
- This generated page is the file-by-file coverage layer; curated subsystem chapters should link here when they synthesize a multi-file control flow.
- Core OS pages should be promoted from atlas-only to deep-reviewed when they explain data structures, invariants, locking, lifecycle, and C implementation snippets.
- Driver-family pages are intentionally pattern-oriented unless they are part of the selected PCIe/NVMe representative device path.