arch/powerpc/platforms/pseries/ras.c

Source file repositories/reference/linux-study-clean/arch/powerpc/platforms/pseries/ras.c

File Facts

System
Linux kernel
Corpus path
arch/powerpc/platforms/pseries/ras.c
Extension
.c
Size
24516 bytes
Lines
883
Domain
Architecture Layer
Bucket
arch/powerpc
Inferred role
Architecture Layer: exported/initcall integration point
Status
integration implementation candidate

Why This File Exists

CPU and platform-specific kernel glue: boot entry, traps, syscall entry, interrupts, page tables, context switch, and low-level barriers.

Dependency Surface

Detected Declarations

Annotated Snippet

struct pseries_mc_errorlog {
	__be32	fru_id;
	__be32	proc_id;
	u8	error_type;
	/*
	 * sub_err_type (1 byte). Bit fields depends on error_type
	 *
	 *   MSB0
	 *   |
	 *   V
	 *   01234567
	 *   XXXXXXXX
	 *
	 * For error_type == MC_ERROR_TYPE_UE
	 *   XXXXXXXX
	 *   X		1: Permanent or Transient UE.
	 *    X		1: Effective address provided.
	 *     X	1: Logical address provided.
	 *      XX	2: Reserved.
	 *        XXX	3: Type of UE error.
	 *
	 * For error_type == MC_ERROR_TYPE_SLB/ERAT/TLB
	 *   XXXXXXXX
	 *   X		1: Effective address provided.
	 *    XXXXX	5: Reserved.
	 *         XX	2: Type of SLB/ERAT/TLB error.
	 *
	 * For error_type == MC_ERROR_TYPE_CTRL_MEM_ACCESS
	 *   XXXXXXXX
	 *   X		1: Error causing address provided.
	 *    XXX	3: Type of error.
	 *       XXXX	4: Reserved.
	 */
	u8	sub_err_type;
	u8	reserved_1[6];
	__be64	effective_address;
	__be64	logical_address;
} __packed;

/* RTAS pseries MCE error types */
#define MC_ERROR_TYPE_UE		0x00
#define MC_ERROR_TYPE_SLB		0x01
#define MC_ERROR_TYPE_ERAT		0x02
#define MC_ERROR_TYPE_UNKNOWN		0x03
#define MC_ERROR_TYPE_TLB		0x04
#define MC_ERROR_TYPE_D_CACHE		0x05
#define MC_ERROR_TYPE_I_CACHE		0x07
#define MC_ERROR_TYPE_CTRL_MEM_ACCESS	0x08

/* RTAS pseries MCE error sub types */
#define MC_ERROR_UE_INDETERMINATE		0
#define MC_ERROR_UE_IFETCH			1
#define MC_ERROR_UE_PAGE_TABLE_WALK_IFETCH	2
#define MC_ERROR_UE_LOAD_STORE			3
#define MC_ERROR_UE_PAGE_TABLE_WALK_LOAD_STORE	4

#define UE_EFFECTIVE_ADDR_PROVIDED		0x40
#define UE_LOGICAL_ADDR_PROVIDED		0x20
#define MC_EFFECTIVE_ADDR_PROVIDED		0x80

#define MC_ERROR_SLB_PARITY		0
#define MC_ERROR_SLB_MULTIHIT		1
#define MC_ERROR_SLB_INDETERMINATE	2

#define MC_ERROR_ERAT_PARITY		1
#define MC_ERROR_ERAT_MULTIHIT		2
#define MC_ERROR_ERAT_INDETERMINATE	3

#define MC_ERROR_TLB_PARITY		1
#define MC_ERROR_TLB_MULTIHIT		2
#define MC_ERROR_TLB_INDETERMINATE	3

#define MC_ERROR_CTRL_MEM_ACCESS_PTABLE_WALK	0
#define MC_ERROR_CTRL_MEM_ACCESS_OP_ACCESS	1

static inline u8 rtas_mc_error_sub_type(const struct pseries_mc_errorlog *mlog)
{
	switch (mlog->error_type) {
	case	MC_ERROR_TYPE_UE:
		return (mlog->sub_err_type & 0x07);
	case	MC_ERROR_TYPE_SLB:
	case	MC_ERROR_TYPE_ERAT:
	case	MC_ERROR_TYPE_TLB:
		return (mlog->sub_err_type & 0x03);
	case	MC_ERROR_TYPE_CTRL_MEM_ACCESS:
		return (mlog->sub_err_type & 0x70) >> 4;
	default:
		return 0;
	}
}

Annotation

Implementation Notes