arch/powerpc/sysdev/fsl_rmu.c
Source file repositories/reference/linux-study-clean/arch/powerpc/sysdev/fsl_rmu.c
File Facts
- System
- Linux kernel
- Corpus path
arch/powerpc/sysdev/fsl_rmu.c- Extension
.c- Size
- 29398 bytes
- Lines
- 1108
- Domain
- Architecture Layer
- Bucket
- arch/powerpc
- Inferred role
- Architecture Layer: implementation source
- Status
- source implementation candidate
Why This File Exists
CPU and platform-specific kernel glue: boot entry, traps, syscall entry, interrupts, page tables, context switch, and low-level barriers.
- CPU and platform-specific kernel glue: boot entry, traps, syscall entry, interrupts, page tables, context switch, and low-level barriers.
- Uses kernel synchronization; read lock ordering, sleepability, and interrupt context assumptions before translating.
- Touches IRQ or DMA behavior; this matters for the representative real-device path.
- Allocates kernel memory; connect allocation flags and lifetime to context constraints.
- Defines or uses C structs; map object ownership, embedded links, reference counts, and lock ownership.
Dependency Surface
linux/types.hlinux/dma-mapping.hlinux/interrupt.hlinux/of_address.hlinux/of_irq.hlinux/slab.hfsl_rio.h
Detected Declarations
struct rio_msg_regsstruct rio_dbell_regsstruct rio_pw_regsstruct rio_tx_descstruct rio_msg_tx_ringstruct rio_msg_rx_ringstruct fsl_rmustruct rio_dbell_msgfunction fsl_rio_tx_handlerfunction fsl_rio_rx_handlerfunction fsl_rio_dbell_handlerfunction msg_unit_error_handlerfunction fsl_rio_port_write_handlerfunction fsl_pw_dpcfunction fsl_rio_pw_enablefunction fsl_rio_port_write_initfunction fsl_rio_doorbell_sendfunction fsl_add_outb_messagefunction fsl_open_outb_mboxfunction fsl_close_outb_mboxfunction fsl_open_inb_mboxfunction fsl_close_inb_mboxfunction fsl_add_inb_bufferfunction fsl_rio_doorbell_initfunction fsl_rio_setup_rmu
Annotated Snippet
struct rio_msg_regs {
u32 omr;
u32 osr;
u32 pad1;
u32 odqdpar;
u32 pad2;
u32 osar;
u32 odpr;
u32 odatr;
u32 odcr;
u32 pad3;
u32 odqepar;
u32 pad4[13];
u32 imr;
u32 isr;
u32 pad5;
u32 ifqdpar;
u32 pad6;
u32 ifqepar;
};
struct rio_dbell_regs {
u32 odmr;
u32 odsr;
u32 pad1[4];
u32 oddpr;
u32 oddatr;
u32 pad2[3];
u32 odretcr;
u32 pad3[12];
u32 dmr;
u32 dsr;
u32 pad4;
u32 dqdpar;
u32 pad5;
u32 dqepar;
};
struct rio_pw_regs {
u32 pwmr;
u32 pwsr;
u32 epwqbar;
u32 pwqbar;
};
struct rio_tx_desc {
u32 pad1;
u32 saddr;
u32 dport;
u32 dattr;
u32 pad2;
u32 pad3;
u32 dwcnt;
u32 pad4;
};
struct rio_msg_tx_ring {
void *virt;
dma_addr_t phys;
void *virt_buffer[RIO_MAX_TX_RING_SIZE];
dma_addr_t phys_buffer[RIO_MAX_TX_RING_SIZE];
int tx_slot;
int size;
void *dev_id;
};
struct rio_msg_rx_ring {
void *virt;
dma_addr_t phys;
void *virt_buffer[RIO_MAX_RX_RING_SIZE];
int rx_slot;
int size;
void *dev_id;
};
struct fsl_rmu {
struct rio_msg_regs __iomem *msg_regs;
struct rio_msg_tx_ring msg_tx_ring;
struct rio_msg_rx_ring msg_rx_ring;
int txirq;
int rxirq;
};
struct rio_dbell_msg {
u16 pad1;
u16 tid;
u16 sid;
u16 info;
};
Annotation
- Immediate include surface: `linux/types.h`, `linux/dma-mapping.h`, `linux/interrupt.h`, `linux/of_address.h`, `linux/of_irq.h`, `linux/slab.h`, `fsl_rio.h`.
- Detected declarations: `struct rio_msg_regs`, `struct rio_dbell_regs`, `struct rio_pw_regs`, `struct rio_tx_desc`, `struct rio_msg_tx_ring`, `struct rio_msg_rx_ring`, `struct fsl_rmu`, `struct rio_dbell_msg`, `function fsl_rio_tx_handler`, `function fsl_rio_rx_handler`.
- Atlas domain: Architecture Layer / arch/powerpc.
- Implementation status: source implementation candidate.
- Synchronization appears in or near this file; preserve lock ordering, sleepability, and interrupt-context constraints.
- IRQ or DMA behavior appears here, which is relevant to the selected PCIe/NVMe device path.
Implementation Notes
- This generated page is the file-by-file coverage layer; curated subsystem chapters should link here when they synthesize a multi-file control flow.
- Core OS pages should be promoted from atlas-only to deep-reviewed when they explain data structures, invariants, locking, lifecycle, and C implementation snippets.
- Driver-family pages are intentionally pattern-oriented unless they are part of the selected PCIe/NVMe representative device path.