arch/powerpc/sysdev/xics/xics-common.c
Source file repositories/reference/linux-study-clean/arch/powerpc/sysdev/xics/xics-common.c
File Facts
- System
- Linux kernel
- Corpus path
arch/powerpc/sysdev/xics/xics-common.c- Extension
.c- Size
- 13374 bytes
- Lines
- 545
- Domain
- Architecture Layer
- Bucket
- arch/powerpc
- Inferred role
- Architecture Layer: implementation source
- Status
- source implementation candidate
Why This File Exists
CPU and platform-specific kernel glue: boot entry, traps, syscall entry, interrupts, page tables, context switch, and low-level barriers.
- CPU and platform-specific kernel glue: boot entry, traps, syscall entry, interrupts, page tables, context switch, and low-level barriers.
- Uses kernel synchronization; read lock ordering, sleepability, and interrupt context assumptions before translating.
- Touches IRQ or DMA behavior; this matters for the representative real-device path.
- Defines or uses C structs; map object ownership, embedded links, reference counts, and lock ownership.
Dependency Surface
linux/types.hlinux/threads.hlinux/kernel.hlinux/irq.hlinux/irqdomain.hlinux/debugfs.hlinux/smp.hlinux/interrupt.hlinux/seq_file.hlinux/init.hlinux/cpu.hlinux/of.hlinux/slab.hlinux/spinlock.hlinux/delay.hasm/io.hasm/smp.hasm/machdep.hasm/irq.hasm/errno.hasm/rtas.hasm/xics.hasm/firmware.h
Detected Declarations
function xics_update_irq_serversfunction xics_set_cpu_giqfunction xics_setup_cpufunction xics_mask_unknown_vecfunction xics_request_ipifunction xics_smp_probefunction xics_teardown_cpufunction xics_kexec_teardown_cpufunction xics_migrate_irqs_awayfunction for_each_irq_descfunction xics_get_irq_serverfunction xics_host_matchfunction xics_ipi_unmaskfunction xics_host_mapfunction xics_host_xlatefunction xics_set_irq_typefunction xics_retriggerfunction xics_host_domain_translatefunction xics_host_domain_allocfunction xics_host_domain_freefunction xics_allocate_domainfunction xics_register_icsfunction xics_get_server_sizefunction xics_init
Annotated Snippet
if (be32_to_cpu(ireg[j]) == hcpuid) {
xics_default_distrib_server = be32_to_cpu(ireg[j+1]);
break;
}
}
pr_devel("xics: xics_default_distrib_server = 0x%x\n",
xics_default_distrib_server);
of_node_put(np);
}
/* GIQ stuff, currently only supported on RTAS setups, will have
* to be sorted properly for bare metal
*/
void xics_set_cpu_giq(unsigned int gserver, unsigned int join)
{
#ifdef CONFIG_PPC_RTAS
int index;
int status;
if (!rtas_indicator_present(GLOBAL_INTERRUPT_QUEUE, NULL))
return;
index = (1UL << xics_interrupt_server_size) - 1 - gserver;
status = rtas_set_indicator_fast(GLOBAL_INTERRUPT_QUEUE, index, join);
WARN(status < 0, "set-indicator(%d, %d, %u) returned %d\n",
GLOBAL_INTERRUPT_QUEUE, index, join, status);
#endif
}
void xics_setup_cpu(void)
{
icp_ops->set_priority(LOWEST_PRIORITY);
xics_set_cpu_giq(xics_default_distrib_server, 1);
}
void xics_mask_unknown_vec(unsigned int vec)
{
pr_err("Interrupt 0x%x (real) is invalid, disabling it.\n", vec);
if (WARN_ON(!xics_ics))
return;
xics_ics->mask_unknown(xics_ics, vec);
}
#ifdef CONFIG_SMP
static void __init xics_request_ipi(void)
{
unsigned int ipi;
ipi = irq_create_mapping(xics_host, XICS_IPI);
BUG_ON(!ipi);
/*
* IPIs are marked IRQF_PERCPU. The handler was set in map.
*/
BUG_ON(request_irq(ipi, icp_ops->ipi_action,
IRQF_NO_DEBUG | IRQF_PERCPU | IRQF_NO_THREAD, "IPI", NULL));
}
void __init xics_smp_probe(void)
{
/* Register all the IPIs */
xics_request_ipi();
/* Setup cause_ipi callback based on which ICP is used */
smp_ops->cause_ipi = icp_ops->cause_ipi;
}
#endif /* CONFIG_SMP */
noinstr void xics_teardown_cpu(void)
{
struct xics_cppr *os_cppr = this_cpu_ptr(&xics_cppr);
/*
* we have to reset the cppr index to 0 because we're
* not going to return from the IPI
*/
os_cppr->index = 0;
icp_ops->set_priority(0);
icp_ops->teardown_cpu();
}
noinstr void xics_kexec_teardown_cpu(int secondary)
{
Annotation
- Immediate include surface: `linux/types.h`, `linux/threads.h`, `linux/kernel.h`, `linux/irq.h`, `linux/irqdomain.h`, `linux/debugfs.h`, `linux/smp.h`, `linux/interrupt.h`.
- Detected declarations: `function xics_update_irq_servers`, `function xics_set_cpu_giq`, `function xics_setup_cpu`, `function xics_mask_unknown_vec`, `function xics_request_ipi`, `function xics_smp_probe`, `function xics_teardown_cpu`, `function xics_kexec_teardown_cpu`, `function xics_migrate_irqs_away`, `function for_each_irq_desc`.
- Atlas domain: Architecture Layer / arch/powerpc.
- Implementation status: source implementation candidate.
- Synchronization appears in or near this file; preserve lock ordering, sleepability, and interrupt-context constraints.
- IRQ or DMA behavior appears here, which is relevant to the selected PCIe/NVMe device path.
Implementation Notes
- This generated page is the file-by-file coverage layer; curated subsystem chapters should link here when they synthesize a multi-file control flow.
- Core OS pages should be promoted from atlas-only to deep-reviewed when they explain data structures, invariants, locking, lifecycle, and C implementation snippets.
- Driver-family pages are intentionally pattern-oriented unless they are part of the selected PCIe/NVMe representative device path.