arch/powerpc/sysdev/xive/common.c
Source file repositories/reference/linux-study-clean/arch/powerpc/sysdev/xive/common.c
File Facts
- System
- Linux kernel
- Corpus path
arch/powerpc/sysdev/xive/common.c- Extension
.c- Size
- 46178 bytes
- Lines
- 1853
- Domain
- Architecture Layer
- Bucket
- arch/powerpc
- Inferred role
- Architecture Layer: exported/initcall integration point
- Status
- integration implementation candidate
Why This File Exists
CPU and platform-specific kernel glue: boot entry, traps, syscall entry, interrupts, page tables, context switch, and low-level barriers.
- CPU and platform-specific kernel glue: boot entry, traps, syscall entry, interrupts, page tables, context switch, and low-level barriers.
- Exports symbols or registers init work; inspect boot/module ordering and who consumes the exported contract.
- Uses kernel synchronization; read lock ordering, sleepability, and interrupt context assumptions before translating.
- Touches IRQ or DMA behavior; this matters for the representative real-device path.
- Allocates kernel memory; connect allocation flags and lifetime to context constraints.
- Defines or uses C structs; map object ownership, embedded links, reference counts, and lock ownership.
Dependency Surface
linux/types.hlinux/threads.hlinux/kernel.hlinux/irq.hlinux/irqdomain.hlinux/debugfs.hlinux/smp.hlinux/interrupt.hlinux/seq_file.hlinux/init.hlinux/cpu.hlinux/of.hlinux/slab.hlinux/spinlock.hlinux/msi.hlinux/vmalloc.hasm/io.hasm/smp.hasm/machdep.hasm/irq.hasm/errno.hasm/xive.hasm/xive-regs.hasm/xmon.hxive-internal.h
Detected Declarations
struct xive_ipi_alloc_infofunction early_cpu_to_nodefunction xive_is_store_eoifunction xive_read_eqfunction CPPRfunction xive_esb_readfunction xive_esb_writefunction xive_irq_data_dumpfunction xive_dump_eqfunction xmon_xive_do_dumpfunction xmon_xive_get_irq_configfunction xmon_xive_get_irq_allfunction for_each_irq_descfunction xive_get_irqfunction force_external_irq_replayfunction xive_do_source_eoifunction xive_irq_eoifunction xive_do_source_set_maskfunction xive_try_pick_targetfunction xive_dec_target_countfunction xive_find_target_in_maskfunction xive_pick_irq_targetfunction zalloc_cpumask_varfunction xive_irq_startupfunction xive_irq_shutdownfunction xive_irq_unmaskfunction xive_irq_maskfunction xive_irq_set_affinityfunction xive_irq_set_typefunction xive_irq_retriggerfunction xive_irq_set_vcpu_affinityfunction xive_get_irqchip_statefunction is_xive_irqfunction xive_cleanup_irq_datafunction xive_irq_free_datafunction xive_cause_ipifunction xive_muxed_ipi_actionfunction xive_ipi_eoifunction xive_ipi_do_nothingfunction xive_ipi_irq_domain_allocfunction xive_init_ipisfunction for_each_nodefunction xive_request_ipifunction xive_setup_cpu_ipifunction xive_cleanup_cpu_ipifunction xive_smp_probefunction xive_irq_domain_mapfunction xive_irq_domain_unmap
Annotated Snippet
struct xive_ipi_alloc_info {
irq_hw_number_t hwirq;
};
static int xive_ipi_irq_domain_alloc(struct irq_domain *domain, unsigned int virq,
unsigned int nr_irqs, void *arg)
{
struct xive_ipi_alloc_info *info = arg;
int i;
for (i = 0; i < nr_irqs; i++) {
irq_domain_set_info(domain, virq + i, info->hwirq + i, &xive_ipi_chip,
domain->host_data, handle_percpu_irq,
NULL, NULL);
}
return 0;
}
static const struct irq_domain_ops xive_ipi_irq_domain_ops = {
.alloc = xive_ipi_irq_domain_alloc,
};
static int __init xive_init_ipis(void)
{
struct fwnode_handle *fwnode;
struct irq_domain *ipi_domain;
unsigned int node;
int ret = -ENOMEM;
fwnode = irq_domain_alloc_named_fwnode("XIVE-IPI");
if (!fwnode)
goto out;
ipi_domain = irq_domain_create_linear(fwnode, nr_node_ids,
&xive_ipi_irq_domain_ops, NULL);
if (!ipi_domain)
goto out_free_fwnode;
xive_ipis = kzalloc_objs(*xive_ipis, nr_node_ids,
GFP_KERNEL | __GFP_NOFAIL);
if (!xive_ipis)
goto out_free_domain;
for_each_node(node) {
struct xive_ipi_desc *xid = &xive_ipis[node];
struct xive_ipi_alloc_info info = { node };
/*
* Map one IPI interrupt per node for all cpus of that node.
* Since the HW interrupt number doesn't have any meaning,
* simply use the node number.
*/
ret = irq_domain_alloc_irqs(ipi_domain, 1, node, &info);
if (ret < 0)
goto out_free_xive_ipis;
xid->irq = ret;
snprintf(xid->name, sizeof(xid->name), "IPI-%d", node);
}
return ret;
out_free_xive_ipis:
kfree(xive_ipis);
out_free_domain:
irq_domain_remove(ipi_domain);
out_free_fwnode:
irq_domain_free_fwnode(fwnode);
out:
return ret;
}
static int xive_request_ipi(unsigned int cpu)
{
struct xive_ipi_desc *xid = &xive_ipis[early_cpu_to_node(cpu)];
int ret;
if (atomic_inc_return(&xid->started) > 1)
return 0;
ret = request_irq(xid->irq, xive_muxed_ipi_action,
IRQF_NO_DEBUG | IRQF_PERCPU | IRQF_NO_THREAD,
xid->name, NULL);
WARN(ret < 0, "Failed to request IPI %d: %d\n", xid->irq, ret);
return ret;
}
static int xive_setup_cpu_ipi(unsigned int cpu)
{
Annotation
- Immediate include surface: `linux/types.h`, `linux/threads.h`, `linux/kernel.h`, `linux/irq.h`, `linux/irqdomain.h`, `linux/debugfs.h`, `linux/smp.h`, `linux/interrupt.h`.
- Detected declarations: `struct xive_ipi_alloc_info`, `function early_cpu_to_node`, `function xive_is_store_eoi`, `function xive_read_eq`, `function CPPR`, `function xive_esb_read`, `function xive_esb_write`, `function xive_irq_data_dump`, `function xive_dump_eq`, `function xmon_xive_do_dump`.
- Atlas domain: Architecture Layer / arch/powerpc.
- Implementation status: integration implementation candidate.
- Synchronization appears in or near this file; preserve lock ordering, sleepability, and interrupt-context constraints.
- IRQ or DMA behavior appears here, which is relevant to the selected PCIe/NVMe device path.
Implementation Notes
- This generated page is the file-by-file coverage layer; curated subsystem chapters should link here when they synthesize a multi-file control flow.
- Core OS pages should be promoted from atlas-only to deep-reviewed when they explain data structures, invariants, locking, lifecycle, and C implementation snippets.
- Driver-family pages are intentionally pattern-oriented unless they are part of the selected PCIe/NVMe representative device path.