arch/riscv/boot/dts/allwinner/sun20i-d1-lichee-rv-86-panel.dtsi
Source file repositories/reference/linux-study-clean/arch/riscv/boot/dts/allwinner/sun20i-d1-lichee-rv-86-panel.dtsi
File Facts
- System
- Linux kernel
- Corpus path
arch/riscv/boot/dts/allwinner/sun20i-d1-lichee-rv-86-panel.dtsi- Extension
.dtsi- Size
- 2230 bytes
- Lines
- 120
- Domain
- Architecture Layer
- Bucket
- arch/riscv
- Inferred role
- Architecture Layer: configuration, schema, or hardware description
- Status
- atlas-only
Why This File Exists
CPU and platform-specific kernel glue: boot entry, traps, syscall entry, interrupts, page tables, context switch, and low-level barriers.
- CPU and platform-specific kernel glue: boot entry, traps, syscall entry, interrupts, page tables, context switch, and low-level barriers.
Dependency Surface
sun20i-d1-lichee-rv.dts
Detected Declarations
- No top-level syscall, struct, function, initcall, or export declaration detected by the generator.
Annotated Snippet
// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
// Copyright (C) 2022 Samuel Holland <samuel@sholland.org>
#include "sun20i-d1-lichee-rv.dts"
/ {
aliases {
ethernet0 = &emac;
ethernet1 = &xr829;
};
dmic_codec: dmic-codec {
compatible = "dmic-codec";
num-channels = <2>;
#sound-dai-cells = <0>;
};
dmic-sound {
compatible = "simple-audio-card";
simple-audio-card,name = "DMIC";
#address-cells = <1>;
#size-cells = <0>;
simple-audio-card,dai-link@0 {
reg = <0>;
format = "pdm";
frame-master = <&link0_cpu>;
bitclock-master = <&link0_cpu>;
link0_cpu: cpu {
sound-dai = <&dmic>;
};
link0_codec: codec {
sound-dai = <&dmic_codec>;
};
};
};
/* PC1 is repurposed as BT_WAKE_AP */
/delete-node/ leds;
wifi_pwrseq: wifi-pwrseq {
compatible = "mmc-pwrseq-simple";
clocks = <&ccu CLK_FANOUT1>;
clock-names = "ext_clock";
reset-gpios = <&pio 6 12 GPIO_ACTIVE_LOW>; /* PG12 */
assigned-clocks = <&ccu CLK_FANOUT1>;
assigned-clock-rates = <32768>;
pinctrl-0 = <&clk_pg11_pin>;
pinctrl-names = "default";
};
};
&dmic {
pinctrl-0 = <&dmic_pb11_d0_pin>, <&dmic_pe17_clk_pin>;
pinctrl-names = "default";
status = "okay";
};
&ehci1 {
status = "okay";
};
&emac {
pinctrl-0 = <&rmii_pe_pins>;
pinctrl-names = "default";
phy-handle = <&ext_rmii_phy>;
phy-mode = "rmii";
phy-supply = <®_vcc_3v3>;
Annotation
- Immediate include surface: `sun20i-d1-lichee-rv.dts`.
- Atlas domain: Architecture Layer / arch/riscv.
- Implementation status: atlas-only.
Implementation Notes
- This generated page is the file-by-file coverage layer; curated subsystem chapters should link here when they synthesize a multi-file control flow.
- Core OS pages should be promoted from atlas-only to deep-reviewed when they explain data structures, invariants, locking, lifecycle, and C implementation snippets.
- Driver-family pages are intentionally pattern-oriented unless they are part of the selected PCIe/NVMe representative device path.