arch/riscv/boot/dts/allwinner/sunxi-d1s-t113.dtsi

Source file repositories/reference/linux-study-clean/arch/riscv/boot/dts/allwinner/sunxi-d1s-t113.dtsi

File Facts

System
Linux kernel
Corpus path
arch/riscv/boot/dts/allwinner/sunxi-d1s-t113.dtsi
Extension
.dtsi
Size
26288 bytes
Lines
1027
Domain
Architecture Layer
Bucket
arch/riscv
Inferred role
Architecture Layer: configuration, schema, or hardware description
Status
atlas-only

Why This File Exists

CPU and platform-specific kernel glue: boot entry, traps, syscall entry, interrupts, page tables, context switch, and low-level barriers.

Dependency Surface

Detected Declarations

Annotated Snippet

// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
// Copyright (C) 2021-2022 Samuel Holland <samuel@sholland.org>

#include <dt-bindings/clock/sun6i-rtc.h>
#include <dt-bindings/clock/sun8i-de2.h>
#include <dt-bindings/clock/sun8i-tcon-top.h>
#include <dt-bindings/clock/sun20i-d1-ccu.h>
#include <dt-bindings/clock/sun20i-d1-r-ccu.h>
#include <dt-bindings/interrupt-controller/irq.h>
#include <dt-bindings/reset/sun8i-de2.h>
#include <dt-bindings/reset/sun20i-d1-ccu.h>
#include <dt-bindings/reset/sun20i-d1-r-ccu.h>

/ {
	#address-cells = <1>;
	#size-cells = <1>;

	dcxo: dcxo-clk {
		compatible = "fixed-clock";
		clock-output-names = "dcxo";
		#clock-cells = <0>;
	};

	de: display-engine {
		compatible = "allwinner,sun20i-d1-display-engine";
		allwinner,pipelines = <&mixer0>, <&mixer1>;
		status = "disabled";
	};

	soc {
		compatible = "simple-bus";
		ranges;
		dma-noncoherent;
		#address-cells = <1>;
		#size-cells = <1>;

		pio: pinctrl@2000000 {
			compatible = "allwinner,sun20i-d1-pinctrl";
			reg = <0x2000000 0x800>;
			interrupts = <SOC_PERIPHERAL_IRQ(69) IRQ_TYPE_LEVEL_HIGH>,
				     <SOC_PERIPHERAL_IRQ(71) IRQ_TYPE_LEVEL_HIGH>,
				     <SOC_PERIPHERAL_IRQ(73) IRQ_TYPE_LEVEL_HIGH>,
				     <SOC_PERIPHERAL_IRQ(75) IRQ_TYPE_LEVEL_HIGH>,
				     <SOC_PERIPHERAL_IRQ(77) IRQ_TYPE_LEVEL_HIGH>,
				     <SOC_PERIPHERAL_IRQ(79) IRQ_TYPE_LEVEL_HIGH>;
			clocks = <&ccu CLK_APB0>,
				 <&dcxo>,
				 <&rtc CLK_OSC32K>;
			clock-names = "apb", "hosc", "losc";
			gpio-controller;
			interrupt-controller;
			#gpio-cells = <3>;
			#interrupt-cells = <3>;

			/omit-if-no-ref/
			can0_pins: can0-pins {
				pins = "PB2", "PB3";
				function = "can0";
			};

			/omit-if-no-ref/
			can1_pins: can1-pins {
				pins = "PB4", "PB5";
				function = "can1";
			};

			/omit-if-no-ref/
			clk_pg11_pin: clk-pg11-pin {
				pins = "PG11";
				function = "clk";

Annotation

Implementation Notes