arch/riscv/boot/dts/canaan/sipeed_maixduino.dts
Source file repositories/reference/linux-study-clean/arch/riscv/boot/dts/canaan/sipeed_maixduino.dts
File Facts
- System
- Linux kernel
- Corpus path
arch/riscv/boot/dts/canaan/sipeed_maixduino.dts- Extension
.dts- Size
- 4572 bytes
- Lines
- 193
- Domain
- Architecture Layer
- Bucket
- arch/riscv
- Inferred role
- Architecture Layer: configuration, schema, or hardware description
- Status
- atlas-only
Why This File Exists
CPU and platform-specific kernel glue: boot entry, traps, syscall entry, interrupts, page tables, context switch, and low-level barriers.
- CPU and platform-specific kernel glue: boot entry, traps, syscall entry, interrupts, page tables, context switch, and low-level barriers.
Dependency Surface
k210.dtsidt-bindings/gpio/gpio.hdt-bindings/input/input.h
Detected Declarations
- No top-level syscall, struct, function, initcall, or export declaration detected by the generator.
Annotated Snippet
// SPDX-License-Identifier: GPL-2.0+
/*
* Copyright (C) 2019-20 Sean Anderson <seanga2@gmail.com>
* Copyright (C) 2020 Western Digital Corporation or its affiliates.
*/
/dts-v1/;
#include "k210.dtsi"
#include <dt-bindings/gpio/gpio.h>
#include <dt-bindings/input/input.h>
/ {
model = "SiPeed MAIXDUINO";
compatible = "sipeed,maixduino", "canaan,kendryte-k210";
aliases {
serial0 = &uarths0;
};
chosen {
bootargs = "earlycon console=ttySIF0";
stdout-path = "serial0:115200n8";
};
gpio-keys {
compatible = "gpio-keys";
key-boot {
label = "BOOT";
linux,code = <BTN_0>;
gpios = <&gpio0 0 GPIO_ACTIVE_LOW>;
};
};
vcc_3v3: regulator-3v3 {
compatible = "regulator-fixed";
regulator-name = "3v3";
regulator-min-microvolt = <3300000>;
regulator-max-microvolt = <3300000>;
};
};
&fpioa {
uarths_pinctrl: uarths-pinmux {
pinmux = <K210_FPIOA(4, K210_PCF_UARTHS_RX)>, /* Header "0" */
<K210_FPIOA(5, K210_PCF_UARTHS_TX)>; /* Header "1" */
};
gpio_pinctrl: gpio-pinmux {
pinmux = <K210_FPIOA(8, K210_PCF_GPIO0)>,
<K210_FPIOA(9, K210_PCF_GPIO1)>;
};
gpiohs_pinctrl: gpiohs-pinmux {
pinmux = <K210_FPIOA(16, K210_PCF_GPIOHS0)>, /* BOOT */
<K210_FPIOA(21, K210_PCF_GPIOHS2)>, /* Header "2" */
<K210_FPIOA(22, K210_PCF_GPIOHS3)>, /* Header "3" */
<K210_FPIOA(23, K210_PCF_GPIOHS4)>, /* Header "4" */
<K210_FPIOA(24, K210_PCF_GPIOHS5)>, /* Header "5" */
<K210_FPIOA(32, K210_PCF_GPIOHS6)>, /* Header "6" */
<K210_FPIOA(15, K210_PCF_GPIOHS7)>, /* Header "7" */
<K210_FPIOA(14, K210_PCF_GPIOHS8)>, /* Header "8" */
<K210_FPIOA(13, K210_PCF_GPIOHS9)>, /* Header "9" */
<K210_FPIOA(12, K210_PCF_GPIOHS10)>, /* Header "10" */
<K210_FPIOA(11, K210_PCF_GPIOHS11)>, /* Header "11" */
<K210_FPIOA(10, K210_PCF_GPIOHS12)>, /* Header "12" */
<K210_FPIOA(3, K210_PCF_GPIOHS13)>; /* Header "13" */
};
Annotation
- Immediate include surface: `k210.dtsi`, `dt-bindings/gpio/gpio.h`, `dt-bindings/input/input.h`.
- Atlas domain: Architecture Layer / arch/riscv.
- Implementation status: atlas-only.
Implementation Notes
- This generated page is the file-by-file coverage layer; curated subsystem chapters should link here when they synthesize a multi-file control flow.
- Core OS pages should be promoted from atlas-only to deep-reviewed when they explain data structures, invariants, locking, lifecycle, and C implementation snippets.
- Driver-family pages are intentionally pattern-oriented unless they are part of the selected PCIe/NVMe representative device path.