arch/riscv/boot/dts/microchip/pic64gx-curiosity-kit.dts
Source file repositories/reference/linux-study-clean/arch/riscv/boot/dts/microchip/pic64gx-curiosity-kit.dts
File Facts
- System
- Linux kernel
- Corpus path
arch/riscv/boot/dts/microchip/pic64gx-curiosity-kit.dts- Extension
.dts- Size
- 3955 bytes
- Lines
- 173
- Domain
- Architecture Layer
- Bucket
- arch/riscv
- Inferred role
- Architecture Layer: configuration, schema, or hardware description
- Status
- atlas-only
Why This File Exists
CPU and platform-specific kernel glue: boot entry, traps, syscall entry, interrupts, page tables, context switch, and low-level barriers.
- CPU and platform-specific kernel glue: boot entry, traps, syscall entry, interrupts, page tables, context switch, and low-level barriers.
Dependency Surface
pic64gx.dtsipic64gx-pinctrl.dtsi
Detected Declarations
- No top-level syscall, struct, function, initcall, or export declaration detected by the generator.
Annotated Snippet
// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
/*
* Device Tree Source for the PIC64GX Curiosity Kit
*
* Copyright (C) 2024 Microchip Technology Inc. and its subsidiaries
*
* Author: Pierre-Henry Moussay <pierre-henry.moussay@microchip.com>
*
* The Curiosity-GX10000 (PIC64GX SoC Curiosity Kit) is a compact SoC
* prototyping board featuring a Microchip PIC64GX SoC
* PIC64GX-1000. Features include:
* - 1 GB DDR4 SDRAM
* - Gigabit Ethernet
* - microSD-card slot
*
* https://www.microchip.com/en-us/development-tool/curiosity-pic64gx1000-kit-es
*/
/dts-v1/;
#include "pic64gx.dtsi"
#include "pic64gx-pinctrl.dtsi"
/* Clock frequency (in Hz) of the rtcclk */
#define RTCCLK_FREQ 1000000
/ {
#address-cells = <2>;
#size-cells = <2>;
model = "Microchip PIC64GX Curiosity Kit";
compatible = "microchip,pic64gx-curiosity-kit", "microchip,pic64gx";
aliases {
ethernet0 = &mac0;
serial1 = &mmuart1;
serial2 = &mmuart2;
};
chosen {
stdout-path = "serial1:115200n8";
};
cpus {
timebase-frequency = <RTCCLK_FREQ>;
};
memory@80000000 {
device_type = "memory";
reg = <0x0 0x80000000 0x0 0x40000000>;
};
reserved-memory {
#address-cells = <2>;
#size-cells = <2>;
ranges;
hss: hss-buffer@bfc00000 {
compatible = "shared-dma-pool";
reg = <0x0 0xbfc00000 0x0 0x400000>;
no-map;
};
};
};
&gpio0 {
status ="okay";
gpio-line-names =
"", "", "", "", "", "", "", "",
"", "", "", "", "MIPI_CAM_RESET", "MIPI_CAM_STANDBY";
};
Annotation
- Immediate include surface: `pic64gx.dtsi`, `pic64gx-pinctrl.dtsi`.
- Atlas domain: Architecture Layer / arch/riscv.
- Implementation status: atlas-only.
Implementation Notes
- This generated page is the file-by-file coverage layer; curated subsystem chapters should link here when they synthesize a multi-file control flow.
- Core OS pages should be promoted from atlas-only to deep-reviewed when they explain data structures, invariants, locking, lifecycle, and C implementation snippets.
- Driver-family pages are intentionally pattern-oriented unless they are part of the selected PCIe/NVMe representative device path.