arch/riscv/boot/dts/renesas/r9a07g043f.dtsi

Source file repositories/reference/linux-study-clean/arch/riscv/boot/dts/renesas/r9a07g043f.dtsi

File Facts

System
Linux kernel
Corpus path
arch/riscv/boot/dts/renesas/r9a07g043f.dtsi
Extension
.dtsi
Size
4662 bytes
Lines
158
Domain
Architecture Layer
Bucket
arch/riscv
Inferred role
Architecture Layer: configuration, schema, or hardware description
Status
atlas-only

Why This File Exists

CPU and platform-specific kernel glue: boot entry, traps, syscall entry, interrupts, page tables, context switch, and low-level barriers.

Dependency Surface

Detected Declarations

Annotated Snippet

// SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
/*
 * Device Tree Source for the RZ/Five SoC
 *
 * Copyright (C) 2022 Renesas Electronics Corp.
 */

#include <dt-bindings/interrupt-controller/irq.h>

#define SOC_PERIPHERAL_IRQ(nr)	(nr + 32)

#include <arm64/renesas/r9a07g043.dtsi>

/ {
	interrupt-parent = <&plic>;

	cpus {
		#address-cells = <1>;
		#size-cells = <0>;
		timebase-frequency = <12000000>;

		cpu0: cpu@0 {
			compatible = "andestech,ax45mp", "riscv";
			device_type = "cpu";
			#cooling-cells = <2>;
			reg = <0x0>;
			status = "okay";
			riscv,isa = "rv64imafdc";
			riscv,isa-base = "rv64i";
			riscv,isa-extensions = "i", "m", "a", "f", "d", "c",
					       "zicntr", "zicsr", "zifencei",
					       "zihpm", "xandespmu";
			mmu-type = "riscv,sv39";
			i-cache-size = <0x8000>;
			i-cache-line-size = <0x40>;
			d-cache-size = <0x8000>;
			d-cache-line-size = <0x40>;
			next-level-cache = <&l2cache>;
			clocks = <&cpg CPG_CORE R9A07G043_CLK_I>;
			operating-points-v2 = <&cluster0_opp>;

			cpu0_intc: interrupt-controller {
				#interrupt-cells = <1>;
				compatible = "andestech,cpu-intc", "riscv,cpu-intc";
				interrupt-controller;
			};
		};
	};
};

&pinctrl {
	gpio-ranges = <&pinctrl 0 0 232>;
};

&soc {
	dma-noncoherent;

	irqc: interrupt-controller@110a0000 {
		compatible = "renesas,r9a07g043f-irqc";
		reg = <0 0x110a0000 0 0x20000>;
		#interrupt-cells = <2>;
		#address-cells = <0>;
		interrupt-controller;
		interrupts = <32 IRQ_TYPE_LEVEL_HIGH>,
			     <33 IRQ_TYPE_LEVEL_HIGH>,
			     <34 IRQ_TYPE_LEVEL_HIGH>,
			     <35 IRQ_TYPE_LEVEL_HIGH>,
			     <36 IRQ_TYPE_LEVEL_HIGH>,
			     <37 IRQ_TYPE_LEVEL_HIGH>,
			     <38 IRQ_TYPE_LEVEL_HIGH>,

Annotation

Implementation Notes