arch/riscv/boot/dts/sophgo/cv180x.dtsi
Source file repositories/reference/linux-study-clean/arch/riscv/boot/dts/sophgo/cv180x.dtsi
File Facts
- System
- Linux kernel
- Corpus path
arch/riscv/boot/dts/sophgo/cv180x.dtsi- Extension
.dtsi- Size
- 12007 bytes
- Lines
- 464
- Domain
- Architecture Layer
- Bucket
- arch/riscv
- Inferred role
- Architecture Layer: configuration, schema, or hardware description
- Status
- atlas-only
Why This File Exists
CPU and platform-specific kernel glue: boot entry, traps, syscall entry, interrupts, page tables, context switch, and low-level barriers.
- CPU and platform-specific kernel glue: boot entry, traps, syscall entry, interrupts, page tables, context switch, and low-level barriers.
Dependency Surface
dt-bindings/clock/sophgo,cv1800.hdt-bindings/gpio/gpio.hdt-bindings/interrupt-controller/irq.hcv18xx-reset.h
Detected Declarations
- No top-level syscall, struct, function, initcall, or export declaration detected by the generator.
Annotated Snippet
// SPDX-License-Identifier: (GPL-2.0 OR MIT)
/*
* Copyright (C) 2023 Jisheng Zhang <jszhang@kernel.org>
* Copyright (C) 2023 Inochi Amaoto <inochiama@outlook.com>
*/
#include <dt-bindings/clock/sophgo,cv1800.h>
#include <dt-bindings/gpio/gpio.h>
#include <dt-bindings/interrupt-controller/irq.h>
#include "cv18xx-reset.h"
/ {
#address-cells = <1>;
#size-cells = <1>;
osc: oscillator {
compatible = "fixed-clock";
clock-output-names = "osc_25m";
#clock-cells = <0>;
};
soc {
compatible = "simple-bus";
#address-cells = <1>;
#size-cells = <1>;
ranges;
syscon: syscon@3000000 {
compatible = "sophgo,cv1800b-top-syscon",
"syscon", "simple-mfd";
reg = <0x03000000 0x1000>;
#address-cells = <1>;
#size-cells = <1>;
usbphy: phy@48 {
compatible = "sophgo,cv1800b-usb2-phy";
reg = <0x48 0x4>;
#phy-cells = <0>;
clocks = <&clk CLK_USB_125M>,
<&clk CLK_USB_33K>,
<&clk CLK_USB_12M>;
clock-names = "app", "stb", "lpm";
resets = <&rst RST_COMBO_PHY0>;
};
dmamux: dma-router@154 {
compatible = "sophgo,cv1800b-dmamux";
reg = <0x154 0x8>, <0x298 0x4>;
#dma-cells = <2>;
dma-masters = <&dmac>;
};
};
rst: reset-controller@3003000 {
compatible = "sophgo,cv1800b-reset";
reg = <0x3003000 0x1000>;
#reset-cells = <1>;
};
mdio: mdio-mux@3009800 {
compatible = "mdio-mux-mmioreg", "mdio-mux";
reg = <0x3009800 0x4>;
#address-cells = <1>;
#size-cells = <0>;
mdio-parent-bus = <&gmac0_mdio>;
mux-mask = <0x80>;
status = "disabled";
internal_mdio: mdio@0 {
#address-cells = <1>;
Annotation
- Immediate include surface: `dt-bindings/clock/sophgo,cv1800.h`, `dt-bindings/gpio/gpio.h`, `dt-bindings/interrupt-controller/irq.h`, `cv18xx-reset.h`.
- Atlas domain: Architecture Layer / arch/riscv.
- Implementation status: atlas-only.
Implementation Notes
- This generated page is the file-by-file coverage layer; curated subsystem chapters should link here when they synthesize a multi-file control flow.
- Core OS pages should be promoted from atlas-only to deep-reviewed when they explain data structures, invariants, locking, lifecycle, and C implementation snippets.
- Driver-family pages are intentionally pattern-oriented unless they are part of the selected PCIe/NVMe representative device path.