arch/riscv/boot/dts/sophgo/sg2002-licheerv-nano-b.dts

Source file repositories/reference/linux-study-clean/arch/riscv/boot/dts/sophgo/sg2002-licheerv-nano-b.dts

File Facts

System
Linux kernel
Corpus path
arch/riscv/boot/dts/sophgo/sg2002-licheerv-nano-b.dts
Extension
.dts
Size
1753 bytes
Lines
101
Domain
Architecture Layer
Bucket
arch/riscv
Inferred role
Architecture Layer: configuration, schema, or hardware description
Status
atlas-only

Why This File Exists

CPU and platform-specific kernel glue: boot entry, traps, syscall entry, interrupts, page tables, context switch, and low-level barriers.

Dependency Surface

Detected Declarations

Annotated Snippet

// SPDX-License-Identifier: (GPL-2.0 OR MIT)
/*
 * Copyright (C) 2024 Thomas Bonnefille <thomas.bonnefille@bootlin.com>
 */

/dts-v1/;

#include "sg2002.dtsi"

/ {
	model = "LicheeRV Nano B";
	compatible = "sipeed,licheerv-nano-b", "sipeed,licheerv-nano", "sophgo,sg2002";

	aliases {
		gpio0 = &gpio0;
		gpio1 = &gpio1;
		gpio2 = &gpio2;
		gpio3 = &gpio3;
		serial0 = &uart0;
		serial1 = &uart1;
		serial2 = &uart2;
		serial3 = &uart3;
		serial4 = &uart4;
	};

	chosen {
		stdout-path = "serial0:115200n8";
	};
};

&osc {
	clock-frequency = <25000000>;
};

&pinctrl {
	uart0_cfg: uart0-cfg {
		uart0-pins {
			pinmux = <PINMUX(PIN_UART0_TX, 0)>,
				 <PINMUX(PIN_UART0_RX, 0)>;
			bias-pull-up;
			drive-strength-microamp = <10800>;
			power-source = <3300>;
		};
	};

	sdhci0_cfg: sdhci0-cfg {
		sdhci0-clk-pins {
			pinmux = <PINMUX(PIN_SD0_CLK, 0)>;
			bias-pull-up;
			drive-strength-microamp = <16100>;
			power-source = <3300>;
		};

		sdhci0-cmd-pins {
			pinmux = <PINMUX(PIN_SD0_CMD, 0)>;
			bias-pull-up;
			drive-strength-microamp = <10800>;
			power-source = <3300>;
		};

		sdhci0-data-pins {
			pinmux = <PINMUX(PIN_SD0_D0, 0)>,
				 <PINMUX(PIN_SD0_D1, 0)>,
				 <PINMUX(PIN_SD0_D2, 0)>,
				 <PINMUX(PIN_SD0_D3, 0)>;
			bias-pull-up;
			drive-strength-microamp = <10800>;
			power-source = <3300>;
		};

Annotation

Implementation Notes