arch/riscv/boot/dts/spacemit/k3-pinctrl.dtsi
Source file repositories/reference/linux-study-clean/arch/riscv/boot/dts/spacemit/k3-pinctrl.dtsi
File Facts
- System
- Linux kernel
- Corpus path
arch/riscv/boot/dts/spacemit/k3-pinctrl.dtsi- Extension
.dtsi- Size
- 12403 bytes
- Lines
- 693
- Domain
- Architecture Layer
- Bucket
- arch/riscv
- Inferred role
- Architecture Layer: configuration, schema, or hardware description
- Status
- atlas-only
Why This File Exists
CPU and platform-specific kernel glue: boot entry, traps, syscall entry, interrupts, page tables, context switch, and low-level barriers.
- CPU and platform-specific kernel glue: boot entry, traps, syscall entry, interrupts, page tables, context switch, and low-level barriers.
Dependency Surface
dt-bindings/gpio/gpio.h
Detected Declarations
- No top-level syscall, struct, function, initcall, or export declaration detected by the generator.
Annotated Snippet
// SPDX-License-Identifier: GPL-2.0 OR MIT
/*
* Copyright (c) 2026 Yixun Lan <dlan@kernel.org>
*/
#include <dt-bindings/gpio/gpio.h>
#define K3_PADCONF(pin, func) (((pin) << 16) | (func))
/* Map GPIO pin to each bank's <index, offset> */
#define K3_GPIO(x) (x / 32) (x % 32)
&pinctrl {
gmac0_rgmii_0_cfg: gmac0-rgmii-0-cfg {
gmac0-rgmii-0-pins {
pinmux = <K3_PADCONF(0, 1)>, /* gmac0_rxdv */
<K3_PADCONF(1, 1)>, /* gmac0_rx_d0 */
<K3_PADCONF(2, 1)>, /* gmac0_rx_d1 */
<K3_PADCONF(3, 1)>, /* gmac0_rx_clk */
<K3_PADCONF(4, 1)>, /* gmac0_rx_d2 */
<K3_PADCONF(5, 1)>, /* gmac0_rx_d3 */
<K3_PADCONF(6, 1)>, /* gmac0_tx_d0 */
<K3_PADCONF(7, 1)>, /* gmac0_tx_d1 */
<K3_PADCONF(8, 1)>, /* gmac0_tx_clk */
<K3_PADCONF(9, 1)>, /* gmac0_tx_d2 */
<K3_PADCONF(10, 1)>, /* gmac0_tx_d3 */
<K3_PADCONF(11, 1)>, /* gmac0_tx_en */
<K3_PADCONF(12, 1)>, /* gmac0_mdc */
<K3_PADCONF(13, 1)>; /* gmac0_mdio */
bias-disable;
drive-strength = <25>;
power-source = <1800>;
};
};
gmac0_phy_0_cfg: gmac0-phy-0-cfg {
gmac0-phy-0-pins {
pinmux = <K3_PADCONF(14, 1)>; /* gmac0_int */
bias-disable;
drive-strength = <25>;
power-source = <1800>;
};
};
gmac1_rgmii_0_cfg: gmac1-rgmii-0-cfg {
gmac1-rgmii-0-pins {
pinmux = <K3_PADCONF(21, 1)>, /* gmac1_rxdv */
<K3_PADCONF(22, 1)>, /* gmac1 rx d0 */
<K3_PADCONF(23, 1)>, /* gmac1 rx d1 */
<K3_PADCONF(24, 1)>, /* gmac1 rx_clk */
<K3_PADCONF(25, 1)>, /* gmac1 rx d2 */
<K3_PADCONF(26, 1)>, /* gmac1 rx d3 */
<K3_PADCONF(27, 1)>, /* gmac1 tx d0 */
<K3_PADCONF(28, 1)>, /* gmac1 tx d1 */
<K3_PADCONF(29, 1)>, /* gmac1 tx clk */
<K3_PADCONF(30, 1)>, /* gmac1 tx d2 */
<K3_PADCONF(31, 1)>, /* gmac1 tx d3 */
<K3_PADCONF(32, 1)>, /* gmac1 tx_en */
<K3_PADCONF(33, 1)>, /* gmac1 mdc */
<K3_PADCONF(34, 1)>; /* gmac1 mdio */
bias-disable;
drive-strength = <25>;
power-source = <1800>;
};
};
Annotation
- Immediate include surface: `dt-bindings/gpio/gpio.h`.
- Atlas domain: Architecture Layer / arch/riscv.
- Implementation status: atlas-only.
Implementation Notes
- This generated page is the file-by-file coverage layer; curated subsystem chapters should link here when they synthesize a multi-file control flow.
- Core OS pages should be promoted from atlas-only to deep-reviewed when they explain data structures, invariants, locking, lifecycle, and C implementation snippets.
- Driver-family pages are intentionally pattern-oriented unless they are part of the selected PCIe/NVMe representative device path.