arch/riscv/boot/dts/starfive/jh7110-starfive-visionfive-2.dtsi

Source file repositories/reference/linux-study-clean/arch/riscv/boot/dts/starfive/jh7110-starfive-visionfive-2.dtsi

File Facts

System
Linux kernel
Corpus path
arch/riscv/boot/dts/starfive/jh7110-starfive-visionfive-2.dtsi
Extension
.dtsi
Size
1183 bytes
Lines
92
Domain
Architecture Layer
Bucket
arch/riscv
Inferred role
Architecture Layer: configuration, schema, or hardware description
Status
atlas-only

Why This File Exists

CPU and platform-specific kernel glue: boot entry, traps, syscall entry, interrupts, page tables, context switch, and low-level barriers.

Dependency Surface

Detected Declarations

Annotated Snippet

// SPDX-License-Identifier: GPL-2.0 OR MIT
/*
 * Copyright (C) 2022 StarFive Technology Co., Ltd.
 * Copyright (C) 2022 Emil Renner Berthing <kernel@esmil.dk>
 */

/dts-v1/;
#include "jh7110-common.dtsi"

/ {
	aliases {
		ethernet1 = &gmac1;
	};
};

&gmac0 {
	status = "okay";
};

&gmac1 {
	phy-handle = <&phy1>;
	phy-mode = "rgmii-id";
	status = "okay";

	mdio {
		#address-cells = <1>;
		#size-cells = <0>;
		compatible = "snps,dwmac-mdio";

		phy1: ethernet-phy@1 {
			reg = <0>;
		};
	};
};

&i2c0 {
	status = "okay";
};

&mmc0 {
	cap-mmc-highspeed;
	cap-mmc-hw-reset;
	mmc-ddr-1_8v;
	mmc-hs200-1_8v;
	vmmc-supply = <&vcc_3v3>;
	vqmmc-supply = <&emmc_vdd>;
	non-removable;
};

&mmc0_pins {
	 rst-pins {
		pinmux = <GPIOMUX(62, GPOUT_SYS_SDIO0_RST,
				      GPOEN_ENABLE,
				      GPI_NONE)>;
		bias-pull-up;
		drive-strength = <12>;
		input-disable;
		input-schmitt-disable;
		slew-rate = <0>;
	};
};

&mmc1 {
	cd-gpios = <&sysgpio 41 GPIO_ACTIVE_LOW>;
	disable-wp;
};

&pcie0 {
	status = "okay";
};

Annotation

Implementation Notes