arch/riscv/include/asm/arch_hweight.h
Source file repositories/reference/linux-study-clean/arch/riscv/include/asm/arch_hweight.h
File Facts
- System
- Linux kernel
- Corpus path
arch/riscv/include/asm/arch_hweight.h- Extension
.h- Size
- 1587 bytes
- Lines
- 71
- Domain
- Architecture Layer
- Bucket
- arch/riscv
- Inferred role
- Architecture Layer: implementation source
- Status
- source implementation candidate
Why This File Exists
CPU and platform-specific kernel glue: boot entry, traps, syscall entry, interrupts, page tables, context switch, and low-level barriers.
- CPU and platform-specific kernel glue: boot entry, traps, syscall entry, interrupts, page tables, context switch, and low-level barriers.
Dependency Surface
asm/alternative-macros.hasm/hwcap.h
Detected Declarations
function __arch_hweight32function __arch_hweight16function __arch_hweight8function __arch_hweight64function __arch_hweight64
Annotated Snippet
#ifndef _ASM_RISCV_HWEIGHT_H
#define _ASM_RISCV_HWEIGHT_H
#include <asm/alternative-macros.h>
#include <asm/hwcap.h>
#if (BITS_PER_LONG == 64)
#define CPOPW "cpopw "
#elif (BITS_PER_LONG == 32)
#define CPOPW "cpop "
#else
#error "Unexpected BITS_PER_LONG"
#endif
static __always_inline unsigned int __arch_hweight32(unsigned int w)
{
if (!(IS_ENABLED(CONFIG_RISCV_ISA_ZBB) &&
IS_ENABLED(CONFIG_TOOLCHAIN_HAS_ZBB) &&
riscv_has_extension_likely(RISCV_ISA_EXT_ZBB)))
return __sw_hweight32(w);
asm (".option push\n"
".option arch,+zbb\n"
CPOPW "%0, %1\n"
".option pop\n"
: "=r" (w) : "r" (w) :);
return w;
}
static inline unsigned int __arch_hweight16(unsigned int w)
{
return __arch_hweight32(w & 0xffff);
}
static inline unsigned int __arch_hweight8(unsigned int w)
{
return __arch_hweight32(w & 0xff);
}
#if BITS_PER_LONG == 64
static __always_inline unsigned long __arch_hweight64(__u64 w)
{
if (!(IS_ENABLED(CONFIG_RISCV_ISA_ZBB) &&
IS_ENABLED(CONFIG_TOOLCHAIN_HAS_ZBB) &&
riscv_has_extension_likely(RISCV_ISA_EXT_ZBB)))
return __sw_hweight64(w);
asm (".option push\n"
".option arch,+zbb\n"
"cpop %0, %1\n"
".option pop\n"
: "=r" (w) : "r" (w) :);
return w;
}
#else /* BITS_PER_LONG == 64 */
static inline unsigned long __arch_hweight64(__u64 w)
{
return __arch_hweight32((u32)w) +
__arch_hweight32((u32)(w >> 32));
}
#endif /* !(BITS_PER_LONG == 64) */
#endif /* _ASM_RISCV_HWEIGHT_H */
Annotation
- Immediate include surface: `asm/alternative-macros.h`, `asm/hwcap.h`.
- Detected declarations: `function __arch_hweight32`, `function __arch_hweight16`, `function __arch_hweight8`, `function __arch_hweight64`, `function __arch_hweight64`.
- Atlas domain: Architecture Layer / arch/riscv.
- Implementation status: source implementation candidate.
Implementation Notes
- This generated page is the file-by-file coverage layer; curated subsystem chapters should link here when they synthesize a multi-file control flow.
- Core OS pages should be promoted from atlas-only to deep-reviewed when they explain data structures, invariants, locking, lifecycle, and C implementation snippets.
- Driver-family pages are intentionally pattern-oriented unless they are part of the selected PCIe/NVMe representative device path.