arch/riscv/include/asm/cacheinfo.h

File Facts

System

Linux kernel

Corpus path

arch/riscv/include/asm/cacheinfo.h

Extension

.h

Size

511 bytes

Lines

21

Domain

Architecture Layer

Bucket

arch/riscv

Inferred role

Architecture Layer: implementation source

Status

source implementation candidate

Why This File Exists

CPU and platform-specific kernel glue: boot entry, traps, syscall entry, interrupts, page tables, context switch, and low-level barriers.

• CPU and platform-specific kernel glue: boot entry, traps, syscall entry, interrupts, page tables, context switch, and low-level barriers.
• Defines or uses C structs; map object ownership, embedded links, reference counts, and lock ownership.

Dependency Surface

• linux/cacheinfo.h

Detected Declarations

• struct riscv_cacheinfo_ops

Annotated Snippet

struct riscv_cacheinfo_ops {
	const struct attribute_group * (*get_priv_group)(struct cacheinfo
							*this_leaf);
};

void riscv_set_cacheinfo_ops(struct riscv_cacheinfo_ops *ops);
uintptr_t get_cache_size(u32 level, enum cache_type type);
uintptr_t get_cache_geometry(u32 level, enum cache_type type);

#endif /* _ASM_RISCV_CACHEINFO_H */

Annotation

• Immediate include surface: `linux/cacheinfo.h`.
• Detected declarations: `struct riscv_cacheinfo_ops`.
• Atlas domain: Architecture Layer / arch/riscv.
• Implementation status: source implementation candidate.

Implementation Notes

• This generated page is the file-by-file coverage layer; curated subsystem chapters should link here when they synthesize a multi-file control flow.
• Core OS pages should be promoted from atlas-only to deep-reviewed when they explain data structures, invariants, locking, lifecycle, and C implementation snippets.
• Driver-family pages are intentionally pattern-oriented unless they are part of the selected PCIe/NVMe representative device path.