arch/riscv/include/asm/mmiowb.h

File Facts

System

Linux kernel

Corpus path

arch/riscv/include/asm/mmiowb.h

Extension

.h

Size

365 bytes

Lines

16

Domain

Architecture Layer

Bucket

arch/riscv

Inferred role

Architecture Layer: implementation source

Status

source implementation candidate

Why This File Exists

CPU and platform-specific kernel glue: boot entry, traps, syscall entry, interrupts, page tables, context switch, and low-level barriers.

• CPU and platform-specific kernel glue: boot entry, traps, syscall entry, interrupts, page tables, context switch, and low-level barriers.

Dependency Surface

• linux/smp.h
• asm-generic/mmiowb.h

Detected Declarations

• No top-level syscall, struct, function, initcall, or export declaration detected by the generator.

Annotated Snippet

#ifndef _ASM_RISCV_MMIOWB_H
#define _ASM_RISCV_MMIOWB_H

/*
 * "o,w" is sufficient to ensure that all writes to the device have completed
 * before the write to the spinlock is allowed to commit.
 */
#define mmiowb()	RISCV_FENCE(o, w)

#include <linux/smp.h>
#include <asm-generic/mmiowb.h>

#endif	/* _ASM_RISCV_MMIOWB_H */

Annotation

• Immediate include surface: `linux/smp.h`, `asm-generic/mmiowb.h`.
• Atlas domain: Architecture Layer / arch/riscv.
• Implementation status: source implementation candidate.

Implementation Notes

• This generated page is the file-by-file coverage layer; curated subsystem chapters should link here when they synthesize a multi-file control flow.
• Core OS pages should be promoted from atlas-only to deep-reviewed when they explain data structures, invariants, locking, lifecycle, and C implementation snippets.
• Driver-family pages are intentionally pattern-oriented unless they are part of the selected PCIe/NVMe representative device path.