arch/riscv/include/asm/soc.h
Source file repositories/reference/linux-study-clean/arch/riscv/include/asm/soc.h
File Facts
- System
- Linux kernel
- Corpus path
arch/riscv/include/asm/soc.h- Extension
.h- Size
- 627 bytes
- Lines
- 25
- Domain
- Architecture Layer
- Bucket
- arch/riscv
- Inferred role
- Architecture Layer: implementation source
- Status
- source implementation candidate
Why This File Exists
CPU and platform-specific kernel glue: boot entry, traps, syscall entry, interrupts, page tables, context switch, and low-level barriers.
- CPU and platform-specific kernel glue: boot entry, traps, syscall entry, interrupts, page tables, context switch, and low-level barriers.
- Defines or uses C structs; map object ownership, embedded links, reference counts, and lock ownership.
Dependency Surface
linux/of.hlinux/linkage.hlinux/types.h
Detected Declarations
- No top-level syscall, struct, function, initcall, or export declaration detected by the generator.
Annotated Snippet
#ifndef _ASM_RISCV_SOC_H
#define _ASM_RISCV_SOC_H
#include <linux/of.h>
#include <linux/linkage.h>
#include <linux/types.h>
#define SOC_EARLY_INIT_DECLARE(name, compat, fn) \
static const struct of_device_id __soc_early_init__##name \
__used __section("__soc_early_init_table") \
= { .compatible = compat, .data = fn }
void soc_early_init(void);
extern unsigned long __soc_early_init_table_start;
extern unsigned long __soc_early_init_table_end;
#endif
Annotation
- Immediate include surface: `linux/of.h`, `linux/linkage.h`, `linux/types.h`.
- Atlas domain: Architecture Layer / arch/riscv.
- Implementation status: source implementation candidate.
Implementation Notes
- This generated page is the file-by-file coverage layer; curated subsystem chapters should link here when they synthesize a multi-file control flow.
- Core OS pages should be promoted from atlas-only to deep-reviewed when they explain data structures, invariants, locking, lifecycle, and C implementation snippets.
- Driver-family pages are intentionally pattern-oriented unless they are part of the selected PCIe/NVMe representative device path.