arch/riscv/include/asm/switch_to.h
Source file repositories/reference/linux-study-clean/arch/riscv/include/asm/switch_to.h
File Facts
- System
- Linux kernel
- Corpus path
arch/riscv/include/asm/switch_to.h- Extension
.h- Size
- 3400 bytes
- Lines
- 129
- Domain
- Architecture Layer
- Bucket
- arch/riscv
- Inferred role
- Architecture Layer: implementation source
- Status
- source implementation candidate
Why This File Exists
CPU and platform-specific kernel glue: boot entry, traps, syscall entry, interrupts, page tables, context switch, and low-level barriers.
- CPU and platform-specific kernel glue: boot entry, traps, syscall entry, interrupts, page tables, context switch, and low-level barriers.
- Defines or uses C structs; map object ownership, embedded links, reference counts, and lock ownership.
Dependency Surface
linux/jump_label.hlinux/sched/task_stack.hlinux/mm_types.hasm/vector.hasm/cpufeature.hasm/processor.hasm/ptrace.hasm/csr.h
Detected Declarations
function __fstate_cleanfunction fstate_offfunction fstate_savefunction fstate_restorefunction __switch_to_fpufunction has_fpufunction has_fpufunction envcfg_update_bitsfunction __switch_to_envcfgfunction switch_to_should_flush_icache
Annotated Snippet
static __always_inline bool has_fpu(void) { return false; }
#define fstate_save(task, regs) do { } while (0)
#define fstate_restore(task, regs) do { } while (0)
#define __switch_to_fpu(__prev, __next) do { } while (0)
#endif
static inline void envcfg_update_bits(struct task_struct *task,
unsigned long mask, unsigned long val)
{
unsigned long envcfg;
envcfg = (task->thread.envcfg & ~mask) | val;
task->thread.envcfg = envcfg;
if (task == current)
csr_write(CSR_ENVCFG, envcfg);
}
static inline void __switch_to_envcfg(struct task_struct *next)
{
asm volatile (ALTERNATIVE("nop", "csrw " __stringify(CSR_ENVCFG) ", %0",
0, RISCV_ISA_EXT_XLINUXENVCFG, 1)
:: "r" (next->thread.envcfg) : "memory");
}
extern struct task_struct *__switch_to(struct task_struct *,
struct task_struct *);
static inline bool switch_to_should_flush_icache(struct task_struct *task)
{
#ifdef CONFIG_SMP
bool stale_mm = task->mm && task->mm->context.force_icache_flush;
bool stale_thread = task->thread.force_icache_flush;
bool thread_migrated = smp_processor_id() != task->thread.prev_cpu;
return thread_migrated && (stale_mm || stale_thread);
#else
return false;
#endif
}
#ifdef CONFIG_SMP
#define __set_prev_cpu(thread) ((thread).prev_cpu = smp_processor_id())
#else
#define __set_prev_cpu(thread)
#endif
#define switch_to(prev, next, last) \
do { \
struct task_struct *__prev = (prev); \
struct task_struct *__next = (next); \
__set_prev_cpu(__prev->thread); \
if (has_fpu()) \
__switch_to_fpu(__prev, __next); \
if (has_vector() || has_xtheadvector()) \
__switch_to_vector(__prev, __next); \
if (switch_to_should_flush_icache(__next)) \
local_flush_icache_all(); \
__switch_to_envcfg(__next); \
((last) = __switch_to(__prev, __next)); \
} while (0)
#endif /* _ASM_RISCV_SWITCH_TO_H */
Annotation
- Immediate include surface: `linux/jump_label.h`, `linux/sched/task_stack.h`, `linux/mm_types.h`, `asm/vector.h`, `asm/cpufeature.h`, `asm/processor.h`, `asm/ptrace.h`, `asm/csr.h`.
- Detected declarations: `function __fstate_clean`, `function fstate_off`, `function fstate_save`, `function fstate_restore`, `function __switch_to_fpu`, `function has_fpu`, `function has_fpu`, `function envcfg_update_bits`, `function __switch_to_envcfg`, `function switch_to_should_flush_icache`.
- Atlas domain: Architecture Layer / arch/riscv.
- Implementation status: source implementation candidate.
Implementation Notes
- This generated page is the file-by-file coverage layer; curated subsystem chapters should link here when they synthesize a multi-file control flow.
- Core OS pages should be promoted from atlas-only to deep-reviewed when they explain data structures, invariants, locking, lifecycle, and C implementation snippets.
- Driver-family pages are intentionally pattern-oriented unless they are part of the selected PCIe/NVMe representative device path.