arch/riscv/include/asm/sync_core.h

Source file repositories/reference/linux-study-clean/arch/riscv/include/asm/sync_core.h

File Facts

System
Linux kernel
Corpus path
arch/riscv/include/asm/sync_core.h
Extension
.h
Size
689 bytes
Lines
30
Domain
Architecture Layer
Bucket
arch/riscv
Inferred role
Architecture Layer: implementation source
Status
source implementation candidate

Why This File Exists

CPU and platform-specific kernel glue: boot entry, traps, syscall entry, interrupts, page tables, context switch, and low-level barriers.

Dependency Surface

Detected Declarations

Annotated Snippet

#ifndef _ASM_RISCV_SYNC_CORE_H
#define _ASM_RISCV_SYNC_CORE_H

/*
 * RISC-V implements return to user-space through an xRET instruction,
 * which is not core serializing.
 */
static inline void sync_core_before_usermode(void)
{
	asm volatile ("fence.i" ::: "memory");
}

#ifdef CONFIG_SMP
/*
 * Ensure the next switch_mm() on every CPU issues a core serializing
 * instruction for the given @mm.
 */
static inline void prepare_sync_core_cmd(struct mm_struct *mm)
{
	cpumask_setall(&mm->context.icache_stale_mask);
}
#else
static inline void prepare_sync_core_cmd(struct mm_struct *mm)
{
}
#endif /* CONFIG_SMP */

#endif /* _ASM_RISCV_SYNC_CORE_H */

Annotation

Implementation Notes