arch/riscv/include/asm/vdso/arch_data.h
Source file repositories/reference/linux-study-clean/arch/riscv/include/asm/vdso/arch_data.h
File Facts
- System
- Linux kernel
- Corpus path
arch/riscv/include/asm/vdso/arch_data.h- Extension
.h- Size
- 638 bytes
- Lines
- 24
- Domain
- Architecture Layer
- Bucket
- arch/riscv
- Inferred role
- Architecture Layer: implementation source
- Status
- source implementation candidate
Why This File Exists
CPU and platform-specific kernel glue: boot entry, traps, syscall entry, interrupts, page tables, context switch, and low-level barriers.
- CPU and platform-specific kernel glue: boot entry, traps, syscall entry, interrupts, page tables, context switch, and low-level barriers.
- Defines or uses C structs; map object ownership, embedded links, reference counts, and lock ownership.
Dependency Surface
linux/types.hvdso/datapage.hasm/hwprobe.h
Detected Declarations
struct vdso_arch_data
Annotated Snippet
struct vdso_arch_data {
/* Stash static answers to the hwprobe queries when all CPUs are selected. */
__u64 all_cpu_hwprobe_values[RISCV_HWPROBE_MAX_KEY + 1];
/* Boolean indicating all CPUs have the same static hwprobe values. */
__u8 homogeneous_cpus;
/*
* A gate to check and see if the hwprobe data is actually ready, as
* probing is deferred to avoid boot slowdowns.
*/
__u8 ready;
};
#endif /* __RISCV_ASM_VDSO_ARCH_DATA_H */
Annotation
- Immediate include surface: `linux/types.h`, `vdso/datapage.h`, `asm/hwprobe.h`.
- Detected declarations: `struct vdso_arch_data`.
- Atlas domain: Architecture Layer / arch/riscv.
- Implementation status: source implementation candidate.
Implementation Notes
- This generated page is the file-by-file coverage layer; curated subsystem chapters should link here when they synthesize a multi-file control flow.
- Core OS pages should be promoted from atlas-only to deep-reviewed when they explain data structures, invariants, locking, lifecycle, and C implementation snippets.
- Driver-family pages are intentionally pattern-oriented unless they are part of the selected PCIe/NVMe representative device path.