arch/riscv/include/asm/vdso/processor.h
Source file repositories/reference/linux-study-clean/arch/riscv/include/asm/vdso/processor.h
File Facts
- System
- Linux kernel
- Corpus path
arch/riscv/include/asm/vdso/processor.h- Extension
.h- Size
- 592 bytes
- Lines
- 30
- Domain
- Architecture Layer
- Bucket
- arch/riscv
- Inferred role
- Architecture Layer: implementation source
- Status
- source implementation candidate
Why This File Exists
CPU and platform-specific kernel glue: boot entry, traps, syscall entry, interrupts, page tables, context switch, and low-level barriers.
- CPU and platform-specific kernel glue: boot entry, traps, syscall entry, interrupts, page tables, context switch, and low-level barriers.
Dependency Surface
asm/barrier.hasm/errata_list.hasm/insn-def.h
Detected Declarations
function cpu_relax
Annotated Snippet
#ifndef __ASM_VDSO_PROCESSOR_H
#define __ASM_VDSO_PROCESSOR_H
#ifndef __ASSEMBLER__
#include <asm/barrier.h>
#include <asm/errata_list.h>
#include <asm/insn-def.h>
static inline void cpu_relax(void)
{
#ifdef __riscv_muldiv
int dummy;
/* In lieu of a halt instruction, induce a long-latency stall. */
__asm__ __volatile__ ("div %0, %0, zero" : "=r" (dummy));
#endif
/*
* Reduce instruction retirement.
* This assumes the PC changes.
*/
ALT_RISCV_PAUSE();
barrier();
}
#endif /* __ASSEMBLER__ */
#endif /* __ASM_VDSO_PROCESSOR_H */
Annotation
- Immediate include surface: `asm/barrier.h`, `asm/errata_list.h`, `asm/insn-def.h`.
- Detected declarations: `function cpu_relax`.
- Atlas domain: Architecture Layer / arch/riscv.
- Implementation status: source implementation candidate.
Implementation Notes
- This generated page is the file-by-file coverage layer; curated subsystem chapters should link here when they synthesize a multi-file control flow.
- Core OS pages should be promoted from atlas-only to deep-reviewed when they explain data structures, invariants, locking, lifecycle, and C implementation snippets.
- Driver-family pages are intentionally pattern-oriented unless they are part of the selected PCIe/NVMe representative device path.