arch/riscv/Kconfig.vendor
Source file repositories/reference/linux-study-clean/arch/riscv/Kconfig.vendor
File Facts
- System
- Linux kernel
- Corpus path
arch/riscv/Kconfig.vendor- Extension
.vendor- Size
- 2021 bytes
- Lines
- 72
- Domain
- Architecture Layer
- Bucket
- arch/riscv
- Inferred role
- Architecture Layer: arch/riscv
- Status
- atlas-only
Why This File Exists
CPU and platform-specific kernel glue: boot entry, traps, syscall entry, interrupts, page tables, context switch, and low-level barriers.
- CPU and platform-specific kernel glue: boot entry, traps, syscall entry, interrupts, page tables, context switch, and low-level barriers.
Dependency Surface
- No C-style include directives detected by the generator.
Detected Declarations
- No top-level syscall, struct, function, initcall, or export declaration detected by the generator.
Annotated Snippet
menu "Vendor extensions"
config RISCV_ISA_VENDOR_EXT
bool
menu "Andes"
config RISCV_ISA_VENDOR_EXT_ANDES
bool "Andes vendor extension support"
select RISCV_ISA_VENDOR_EXT
default y
help
Say N here if you want to disable all Andes vendor extension
support. This will cause any Andes vendor extensions that are
requested by hardware probing to be ignored.
If you don't know what to do here, say Y.
endmenu
menu "MIPS"
config RISCV_ISA_VENDOR_EXT_MIPS
bool "MIPS vendor extension support"
select RISCV_ISA_VENDOR_EXT
default y
help
Say N here to disable detection of and support for all MIPS vendor
extensions. Without this option enabled, MIPS vendor extensions will
not be detected at boot and their presence not reported to userspace.
If you don't know what to do here, say Y.
endmenu
menu "SiFive"
config RISCV_ISA_VENDOR_EXT_SIFIVE
bool "SiFive vendor extension support"
select RISCV_ISA_VENDOR_EXT
default y
help
Say N here if you want to disable all SiFive vendor extension
support. This will cause any SiFive vendor extensions that are
requested by hardware probing to be ignored.
If you don't know what to do here, say Y.
endmenu
menu "T-Head"
config RISCV_ISA_VENDOR_EXT_THEAD
bool "T-Head vendor extension support"
select RISCV_ISA_VENDOR_EXT
default y
help
Say N here to disable detection of and support for all T-Head vendor
extensions. Without this option enabled, T-Head vendor extensions will
not be detected at boot and their presence not reported to userspace.
If you don't know what to do here, say Y.
config RISCV_ISA_XTHEADVECTOR
bool "xtheadvector extension support"
depends on RISCV_ISA_VENDOR_EXT_THEAD
depends on RISCV_ISA_V
depends on FPU
default y
help
Say N here if you want to disable all xtheadvector related procedures
in the kernel. This will disable vector for any T-Head board that
contains xtheadvector rather than the standard vector.
If you don't know what to do here, say Y.
endmenu
Annotation
- Atlas domain: Architecture Layer / arch/riscv.
- Implementation status: atlas-only.
Implementation Notes
- This generated page is the file-by-file coverage layer; curated subsystem chapters should link here when they synthesize a multi-file control flow.
- Core OS pages should be promoted from atlas-only to deep-reviewed when they explain data structures, invariants, locking, lifecycle, and C implementation snippets.
- Driver-family pages are intentionally pattern-oriented unless they are part of the selected PCIe/NVMe representative device path.