arch/riscv/kernel/probes/uprobes.c
Source file repositories/reference/linux-study-clean/arch/riscv/kernel/probes/uprobes.c
File Facts
- System
- Linux kernel
- Corpus path
arch/riscv/kernel/probes/uprobes.c- Extension
.c- Size
- 3780 bytes
- Lines
- 183
- Domain
- Architecture Layer
- Bucket
- arch/riscv
- Inferred role
- Architecture Layer: implementation source
- Status
- source implementation candidate
Why This File Exists
CPU and platform-specific kernel glue: boot entry, traps, syscall entry, interrupts, page tables, context switch, and low-level barriers.
- CPU and platform-specific kernel glue: boot entry, traps, syscall entry, interrupts, page tables, context switch, and low-level barriers.
- Defines or uses C structs; map object ownership, embedded links, reference counts, and lock ownership.
Dependency Surface
linux/highmem.hlinux/ptrace.hlinux/uprobes.hasm/insn.hdecode-insn.h
Detected Declarations
function is_swbp_insnfunction is_trap_insnfunction uprobe_get_swbp_addrfunction arch_uprobe_analyze_insnfunction arch_uprobe_pre_xolfunction arch_uprobe_post_xolfunction arch_uprobe_xol_was_trappedfunction arch_uprobe_skip_sstepfunction arch_uprobe_abort_xolfunction arch_uretprobe_is_alivefunction arch_uretprobe_hijack_return_addrfunction arch_uprobe_exception_notifyfunction uprobe_breakpoint_handlerfunction uprobe_single_step_handlerfunction arch_uprobe_copy_ixol
Annotated Snippet
// SPDX-License-Identifier: GPL-2.0-only
#include <linux/highmem.h>
#include <linux/ptrace.h>
#include <linux/uprobes.h>
#include <asm/insn.h>
#include "decode-insn.h"
#define UPROBE_TRAP_NR UINT_MAX
bool is_swbp_insn(uprobe_opcode_t *insn)
{
#ifdef CONFIG_RISCV_ISA_C
return (*insn & 0xffff) == UPROBE_SWBP_INSN;
#else
return *insn == UPROBE_SWBP_INSN;
#endif
}
bool is_trap_insn(uprobe_opcode_t *insn)
{
return riscv_insn_is_ebreak(*insn) || riscv_insn_is_c_ebreak(*insn);
}
unsigned long uprobe_get_swbp_addr(struct pt_regs *regs)
{
return instruction_pointer(regs);
}
int arch_uprobe_analyze_insn(struct arch_uprobe *auprobe, struct mm_struct *mm,
unsigned long addr)
{
probe_opcode_t opcode;
opcode = *(probe_opcode_t *)(&auprobe->insn[0]);
auprobe->insn_size = GET_INSN_LENGTH(opcode);
switch (riscv_probe_decode_insn(&opcode, &auprobe->api)) {
case INSN_REJECTED:
return -EINVAL;
case INSN_GOOD_NO_SLOT:
auprobe->simulate = true;
break;
case INSN_GOOD:
auprobe->simulate = false;
break;
default:
return -EINVAL;
}
return 0;
}
int arch_uprobe_pre_xol(struct arch_uprobe *auprobe, struct pt_regs *regs)
{
struct uprobe_task *utask = current->utask;
utask->autask.saved_cause = current->thread.bad_cause;
current->thread.bad_cause = UPROBE_TRAP_NR;
instruction_pointer_set(regs, utask->xol_vaddr);
return 0;
}
int arch_uprobe_post_xol(struct arch_uprobe *auprobe, struct pt_regs *regs)
{
struct uprobe_task *utask = current->utask;
WARN_ON_ONCE(current->thread.bad_cause != UPROBE_TRAP_NR);
current->thread.bad_cause = utask->autask.saved_cause;
instruction_pointer_set(regs, utask->vaddr + auprobe->insn_size);
return 0;
}
bool arch_uprobe_xol_was_trapped(struct task_struct *t)
{
if (t->thread.bad_cause != UPROBE_TRAP_NR)
return true;
return false;
}
Annotation
- Immediate include surface: `linux/highmem.h`, `linux/ptrace.h`, `linux/uprobes.h`, `asm/insn.h`, `decode-insn.h`.
- Detected declarations: `function is_swbp_insn`, `function is_trap_insn`, `function uprobe_get_swbp_addr`, `function arch_uprobe_analyze_insn`, `function arch_uprobe_pre_xol`, `function arch_uprobe_post_xol`, `function arch_uprobe_xol_was_trapped`, `function arch_uprobe_skip_sstep`, `function arch_uprobe_abort_xol`, `function arch_uretprobe_is_alive`.
- Atlas domain: Architecture Layer / arch/riscv.
- Implementation status: source implementation candidate.
Implementation Notes
- This generated page is the file-by-file coverage layer; curated subsystem chapters should link here when they synthesize a multi-file control flow.
- Core OS pages should be promoted from atlas-only to deep-reviewed when they explain data structures, invariants, locking, lifecycle, and C implementation snippets.
- Driver-family pages are intentionally pattern-oriented unless they are part of the selected PCIe/NVMe representative device path.