arch/riscv/kernel/vdso/flush_icache.S
Source file repositories/reference/linux-study-clean/arch/riscv/kernel/vdso/flush_icache.S
File Facts
- System
- Linux kernel
- Corpus path
arch/riscv/kernel/vdso/flush_icache.S- Extension
.S- Size
- 474 bytes
- Lines
- 27
- Domain
- Architecture Layer
- Bucket
- arch/riscv
- Inferred role
- Architecture Layer: arch/riscv
- Status
- atlas-only
Why This File Exists
CPU and platform-specific kernel glue: boot entry, traps, syscall entry, interrupts, page tables, context switch, and low-level barriers.
- CPU and platform-specific kernel glue: boot entry, traps, syscall entry, interrupts, page tables, context switch, and low-level barriers.
Dependency Surface
linux/linkage.hasm/unistd.hasm/assembler.h
Detected Declarations
- No top-level syscall, struct, function, initcall, or export declaration detected by the generator.
Annotated Snippet
#include <linux/linkage.h>
#include <asm/unistd.h>
#include <asm/assembler.h>
.text
/* int __vdso_flush_icache(void *start, void *end, unsigned long flags); */
SYM_FUNC_START(__vdso_flush_icache)
.cfi_startproc
vdso_lpad
#ifdef CONFIG_SMP
li a7, __NR_riscv_flush_icache
ecall
#else
fence.i
li a0, 0
#endif
ret
.cfi_endproc
SYM_FUNC_END(__vdso_flush_icache)
emit_riscv_feature_1_and
Annotation
- Immediate include surface: `linux/linkage.h`, `asm/unistd.h`, `asm/assembler.h`.
- Atlas domain: Architecture Layer / arch/riscv.
- Implementation status: atlas-only.
Implementation Notes
- This generated page is the file-by-file coverage layer; curated subsystem chapters should link here when they synthesize a multi-file control flow.
- Core OS pages should be promoted from atlas-only to deep-reviewed when they explain data structures, invariants, locking, lifecycle, and C implementation snippets.
- Driver-family pages are intentionally pattern-oriented unless they are part of the selected PCIe/NVMe representative device path.