arch/riscv/kernel/vendor_extensions/sifive_hwprobe.c
Source file repositories/reference/linux-study-clean/arch/riscv/kernel/vendor_extensions/sifive_hwprobe.c
File Facts
- System
- Linux kernel
- Corpus path
arch/riscv/kernel/vendor_extensions/sifive_hwprobe.c- Extension
.c- Size
- 642 bytes
- Lines
- 23
- Domain
- Architecture Layer
- Bucket
- arch/riscv
- Inferred role
- Architecture Layer: implementation source
- Status
- source implementation candidate
Why This File Exists
CPU and platform-specific kernel glue: boot entry, traps, syscall entry, interrupts, page tables, context switch, and low-level barriers.
- CPU and platform-specific kernel glue: boot entry, traps, syscall entry, interrupts, page tables, context switch, and low-level barriers.
- Defines or uses C structs; map object ownership, embedded links, reference counts, and lock ownership.
Dependency Surface
asm/vendor_extensions/sifive.hasm/vendor_extensions/sifive_hwprobe.hasm/vendor_extensions/vendor_hwprobe.hlinux/cpumask.hlinux/types.huapi/asm/hwprobe.huapi/asm/vendor/sifive.h
Detected Declarations
function hwprobe_isa_vendor_ext_sifive_0
Annotated Snippet
// SPDX-License-Identifier: GPL-2.0-only
#include <asm/vendor_extensions/sifive.h>
#include <asm/vendor_extensions/sifive_hwprobe.h>
#include <asm/vendor_extensions/vendor_hwprobe.h>
#include <linux/cpumask.h>
#include <linux/types.h>
#include <uapi/asm/hwprobe.h>
#include <uapi/asm/vendor/sifive.h>
void hwprobe_isa_vendor_ext_sifive_0(struct riscv_hwprobe *pair, const struct cpumask *cpus)
{
VENDOR_EXTENSION_SUPPORTED(pair, cpus,
riscv_isa_vendor_ext_list_sifive.per_hart_isa_bitmap, {
VENDOR_EXT_KEY(XSFVQMACCDOD);
VENDOR_EXT_KEY(XSFVQMACCQOQ);
VENDOR_EXT_KEY(XSFVFNRCLIPXFQF);
VENDOR_EXT_KEY(XSFVFWMACCQQQ);
});
}
Annotation
- Immediate include surface: `asm/vendor_extensions/sifive.h`, `asm/vendor_extensions/sifive_hwprobe.h`, `asm/vendor_extensions/vendor_hwprobe.h`, `linux/cpumask.h`, `linux/types.h`, `uapi/asm/hwprobe.h`, `uapi/asm/vendor/sifive.h`.
- Detected declarations: `function hwprobe_isa_vendor_ext_sifive_0`.
- Atlas domain: Architecture Layer / arch/riscv.
- Implementation status: source implementation candidate.
Implementation Notes
- This generated page is the file-by-file coverage layer; curated subsystem chapters should link here when they synthesize a multi-file control flow.
- Core OS pages should be promoted from atlas-only to deep-reviewed when they explain data structures, invariants, locking, lifecycle, and C implementation snippets.
- Driver-family pages are intentionally pattern-oriented unless they are part of the selected PCIe/NVMe representative device path.