arch/riscv/mm/pgtable.c
Source file repositories/reference/linux-study-clean/arch/riscv/mm/pgtable.c
File Facts
- System
- Linux kernel
- Corpus path
arch/riscv/mm/pgtable.c- Extension
.c- Size
- 4111 bytes
- Lines
- 183
- Domain
- Architecture Layer
- Bucket
- arch/riscv
- Inferred role
- Architecture Layer: exported/initcall integration point
- Status
- integration implementation candidate
Why This File Exists
CPU and platform-specific kernel glue: boot entry, traps, syscall entry, interrupts, page tables, context switch, and low-level barriers.
- CPU and platform-specific kernel glue: boot entry, traps, syscall entry, interrupts, page tables, context switch, and low-level barriers.
- Exports symbols or registers init work; inspect boot/module ordering and who consumes the exported contract.
- Defines or uses C structs; map object ownership, embedded links, reference counts, and lock ownership.
Dependency Surface
asm/pgalloc.hlinux/gfp.hlinux/kernel.hlinux/pgtable.h
Detected Declarations
function ptep_set_access_flagsfunction ptep_test_and_clear_youngfunction p4d_set_hugefunction p4d_clear_hugefunction pud_clear_hugefunction pud_free_pmd_pagefunction pmd_set_hugefunction pmd_clear_hugefunction pmd_free_pte_pagefunction pmdp_collapse_flushfunction pudp_invalidatefunction pte_mkwritefunction pmd_mkwriteexport ptep_test_and_clear_youngexport pud_offsetexport p4d_offset
Annotated Snippet
if (!pte_same(ptep_get(ptep), entry)) {
__set_pte_at(vma->vm_mm, ptep, entry);
/* Here only not svadu is impacted */
flush_tlb_page(vma, address);
return true;
}
return false;
}
if (!pte_same(ptep_get(ptep), entry))
__set_pte_at(vma->vm_mm, ptep, entry);
/*
* update_mmu_cache will unconditionally execute, handling both
* the case that the PTE changed and the spurious fault case.
*/
return true;
}
bool ptep_test_and_clear_young(struct vm_area_struct *vma,
unsigned long address, pte_t *ptep)
{
if (!pte_young(ptep_get(ptep)))
return false;
return test_and_clear_bit(_PAGE_ACCESSED_OFFSET, &pte_val(*ptep));
}
EXPORT_SYMBOL_GPL(ptep_test_and_clear_young);
#ifdef CONFIG_64BIT
pud_t *pud_offset(p4d_t *p4d, unsigned long address)
{
if (pgtable_l4_enabled)
return p4d_pgtable(p4dp_get(p4d)) + pud_index(address);
return (pud_t *)p4d;
}
EXPORT_SYMBOL_GPL(pud_offset);
p4d_t *p4d_offset(pgd_t *pgd, unsigned long address)
{
if (pgtable_l5_enabled)
return pgd_pgtable(pgdp_get(pgd)) + p4d_index(address);
return (p4d_t *)pgd;
}
EXPORT_SYMBOL_GPL(p4d_offset);
#endif
#ifdef CONFIG_HAVE_ARCH_HUGE_VMAP
int p4d_set_huge(p4d_t *p4d, phys_addr_t addr, pgprot_t prot)
{
return 0;
}
void p4d_clear_huge(p4d_t *p4d)
{
}
int pud_set_huge(pud_t *pud, phys_addr_t phys, pgprot_t prot)
{
pud_t new_pud = pfn_pud(__phys_to_pfn(phys), prot);
set_pud(pud, new_pud);
return 1;
}
int pud_clear_huge(pud_t *pud)
{
if (!pud_leaf(pudp_get(pud)))
return 0;
pud_clear(pud);
return 1;
}
int pud_free_pmd_page(pud_t *pud, unsigned long addr)
{
pmd_t *pmd = pud_pgtable(pudp_get(pud));
int i;
pud_clear(pud);
flush_tlb_kernel_range(addr, addr + PUD_SIZE);
for (i = 0; i < PTRS_PER_PMD; i++) {
if (!pmd_none(pmd[i])) {
pte_t *pte = (pte_t *)pmd_page_vaddr(pmd[i]);
pte_free_kernel(NULL, pte);
}
}
Annotation
- Immediate include surface: `asm/pgalloc.h`, `linux/gfp.h`, `linux/kernel.h`, `linux/pgtable.h`.
- Detected declarations: `function ptep_set_access_flags`, `function ptep_test_and_clear_young`, `function p4d_set_huge`, `function p4d_clear_huge`, `function pud_clear_huge`, `function pud_free_pmd_page`, `function pmd_set_huge`, `function pmd_clear_huge`, `function pmd_free_pte_page`, `function pmdp_collapse_flush`.
- Atlas domain: Architecture Layer / arch/riscv.
- Implementation status: integration implementation candidate.
Implementation Notes
- This generated page is the file-by-file coverage layer; curated subsystem chapters should link here when they synthesize a multi-file control flow.
- Core OS pages should be promoted from atlas-only to deep-reviewed when they explain data structures, invariants, locking, lifecycle, and C implementation snippets.
- Driver-family pages are intentionally pattern-oriented unless they are part of the selected PCIe/NVMe representative device path.