arch/s390/include/asm/lowcore.h
Source file repositories/reference/linux-study-clean/arch/s390/include/asm/lowcore.h
File Facts
- System
- Linux kernel
- Corpus path
arch/s390/include/asm/lowcore.h- Extension
.h- Size
- 7483 bytes
- Lines
- 258
- Domain
- Architecture Layer
- Bucket
- arch/s390
- Inferred role
- Architecture Layer: implementation source
- Status
- source implementation candidate
Why This File Exists
CPU and platform-specific kernel glue: boot entry, traps, syscall entry, interrupts, page tables, context switch, and low-level barriers.
- CPU and platform-specific kernel glue: boot entry, traps, syscall entry, interrupts, page tables, context switch, and low-level barriers.
- Defines or uses C structs; map object ownership, embedded links, reference counts, and lock ownership.
Dependency Surface
linux/types.hasm/tod_types.hasm/machine.hasm/ptrace.hasm/ctlreg.hasm/cpu.hasm/types.hasm/alternative.h
Detected Declarations
struct pgm_tdbstruct lowcorefunction set_prefix
Annotated Snippet
struct pgm_tdb {
u64 data[32];
};
struct lowcore {
__u8 pad_0x0000[0x0014-0x0000]; /* 0x0000 */
__u32 ipl_parmblock_ptr; /* 0x0014 */
__u8 pad_0x0018[0x0080-0x0018]; /* 0x0018 */
__u32 ext_params; /* 0x0080 */
union {
struct {
__u16 ext_cpu_addr; /* 0x0084 */
__u16 ext_int_code; /* 0x0086 */
};
__u32 ext_int_code_addr;
};
__u32 svc_int_code; /* 0x0088 */
union {
struct {
__u16 pgm_ilc; /* 0x008c */
__u16 pgm_code; /* 0x008e */
};
__u32 pgm_int_code;
};
__u32 data_exc_code; /* 0x0090 */
__u16 mon_class_num; /* 0x0094 */
union {
struct {
__u8 per_code; /* 0x0096 */
__u8 per_atmid; /* 0x0097 */
};
__u16 per_code_combined;
};
__u64 per_address; /* 0x0098 */
__u8 exc_access_id; /* 0x00a0 */
__u8 per_access_id; /* 0x00a1 */
__u8 op_access_id; /* 0x00a2 */
__u8 ar_mode_id; /* 0x00a3 */
__u8 pad_0x00a4[0x00a8-0x00a4]; /* 0x00a4 */
__u64 trans_exc_code; /* 0x00a8 */
__u64 monitor_code; /* 0x00b0 */
union {
struct {
__u16 subchannel_id; /* 0x00b8 */
__u16 subchannel_nr; /* 0x00ba */
__u32 io_int_parm; /* 0x00bc */
__u32 io_int_word; /* 0x00c0 */
};
struct tpi_info tpi_info; /* 0x00b8 */
};
__u8 pad_0x00c4[0x00c8-0x00c4]; /* 0x00c4 */
__u32 stfl_fac_list; /* 0x00c8 */
__u8 pad_0x00cc[0x00e8-0x00cc]; /* 0x00cc */
__u64 mcck_interruption_code; /* 0x00e8 */
__u8 pad_0x00f0[0x00f4-0x00f0]; /* 0x00f0 */
__u32 external_damage_code; /* 0x00f4 */
__u64 failing_storage_address; /* 0x00f8 */
__u8 pad_0x0100[0x0110-0x0100]; /* 0x0100 */
__u64 pgm_last_break; /* 0x0110 */
__u8 pad_0x0118[0x0120-0x0118]; /* 0x0118 */
psw_t restart_old_psw; /* 0x0120 */
psw_t external_old_psw; /* 0x0130 */
psw_t svc_old_psw; /* 0x0140 */
psw_t program_old_psw; /* 0x0150 */
psw_t mcck_old_psw; /* 0x0160 */
psw_t io_old_psw; /* 0x0170 */
__u8 pad_0x0180[0x01a0-0x0180]; /* 0x0180 */
psw_t restart_psw; /* 0x01a0 */
psw_t external_new_psw; /* 0x01b0 */
psw_t svc_new_psw; /* 0x01c0 */
psw_t program_new_psw; /* 0x01d0 */
psw_t mcck_new_psw; /* 0x01e0 */
psw_t io_new_psw; /* 0x01f0 */
/* Save areas. */
__u64 save_area[8]; /* 0x0200 */
__u64 stack_canary; /* 0x0240 */
__u8 pad_0x0248[0x0280-0x0248]; /* 0x0248 */
__u64 save_area_restart[1]; /* 0x0280 */
__u64 pcpu; /* 0x0288 */
/* Return psws. */
psw_t return_psw; /* 0x0290 */
psw_t return_mcck_psw; /* 0x02a0 */
__u64 last_break; /* 0x02b0 */
/* CPU accounting and timing values. */
__u64 sys_enter_timer; /* 0x02b8 */
Annotation
- Immediate include surface: `linux/types.h`, `asm/tod_types.h`, `asm/machine.h`, `asm/ptrace.h`, `asm/ctlreg.h`, `asm/cpu.h`, `asm/types.h`, `asm/alternative.h`.
- Detected declarations: `struct pgm_tdb`, `struct lowcore`, `function set_prefix`.
- Atlas domain: Architecture Layer / arch/s390.
- Implementation status: source implementation candidate.
Implementation Notes
- This generated page is the file-by-file coverage layer; curated subsystem chapters should link here when they synthesize a multi-file control flow.
- Core OS pages should be promoted from atlas-only to deep-reviewed when they explain data structures, invariants, locking, lifecycle, and C implementation snippets.
- Driver-family pages are intentionally pattern-oriented unless they are part of the selected PCIe/NVMe representative device path.