arch/s390/include/asm/tlbflush.h
Source file repositories/reference/linux-study-clean/arch/s390/include/asm/tlbflush.h
File Facts
- System
- Linux kernel
- Corpus path
arch/s390/include/asm/tlbflush.h- Extension
.h- Size
- 2945 bytes
- Lines
- 122
- Domain
- Architecture Layer
- Bucket
- arch/s390
- Inferred role
- Architecture Layer: implementation source
- Status
- source implementation candidate
Why This File Exists
CPU and platform-specific kernel glue: boot entry, traps, syscall entry, interrupts, page tables, context switch, and low-level barriers.
- CPU and platform-specific kernel glue: boot entry, traps, syscall entry, interrupts, page tables, context switch, and low-level barriers.
- Uses kernel synchronization; read lock ordering, sleepability, and interrupt context assumptions before translating.
- Defines or uses C structs; map object ownership, embedded links, reference counts, and lock ownership.
Dependency Surface
linux/cpufeature.hlinux/mm.hlinux/sched.hasm/processor.hasm/machine.h
Detected Declarations
function __tlb_flush_localfunction __tlb_flush_idtefunction __tlb_flush_globalfunction CPUsfunction __tlb_flush_kernelfunction __tlb_flush_mm_lazyfunction flush_tlb_allfunction flush_tlb_rangefunction flush_tlb_kernel_range
Annotated Snippet
#ifndef _S390_TLBFLUSH_H
#define _S390_TLBFLUSH_H
#include <linux/cpufeature.h>
#include <linux/mm.h>
#include <linux/sched.h>
#include <asm/processor.h>
#include <asm/machine.h>
/*
* Flush all TLB entries on the local CPU.
*/
static inline void __tlb_flush_local(void)
{
asm volatile("ptlb" : : : "memory");
}
/*
* Flush TLB entries for a specific ASCE on all CPUs
*/
static inline void __tlb_flush_idte(unsigned long asce)
{
unsigned long opt;
opt = IDTE_PTOA;
if (machine_has_tlb_guest())
opt |= IDTE_GUEST_ASCE;
/* Global TLB flush for the mm */
asm volatile("idte 0,%1,%0" : : "a" (opt), "a" (asce) : "cc");
}
/*
* Flush all TLB entries on all CPUs.
*/
static inline void __tlb_flush_global(void)
{
unsigned long dummy = 0;
cspg(&dummy, 0, 0);
}
/*
* Flush TLB entries for a specific mm on all CPUs (in case gmap is used
* this implicates multiple ASCEs!).
*/
static inline void __tlb_flush_mm(struct mm_struct *mm)
{
unsigned long gmap_asce;
preempt_disable();
atomic_inc(&mm->context.flush_count);
/* Reset TLB flush mask */
cpumask_copy(mm_cpumask(mm), &mm->context.cpu_attach_mask);
barrier();
gmap_asce = READ_ONCE(mm->context.gmap_asce);
if (gmap_asce != -1UL) {
if (gmap_asce)
__tlb_flush_idte(gmap_asce);
__tlb_flush_idte(mm->context.asce);
} else {
/* Global TLB flush */
__tlb_flush_global();
}
atomic_dec(&mm->context.flush_count);
preempt_enable();
}
static inline void __tlb_flush_kernel(void)
{
__tlb_flush_idte(init_mm.context.asce);
}
static inline void __tlb_flush_mm_lazy(struct mm_struct * mm)
{
spin_lock(&mm->context.lock);
if (mm->context.flush_mm) {
mm->context.flush_mm = 0;
__tlb_flush_mm(mm);
}
spin_unlock(&mm->context.lock);
}
/*
* TLB flushing:
* flush_tlb_all() - flushes all processes TLBs
* flush_tlb_mm(mm) - flushes the specified mm context TLB's
* flush_tlb_page(vma, vmaddr) - flushes one page
* flush_tlb_range(vma, start, end) - flushes a range of pages
* flush_tlb_kernel_range(start, end) - flushes a range of kernel pages
*/
Annotation
- Immediate include surface: `linux/cpufeature.h`, `linux/mm.h`, `linux/sched.h`, `asm/processor.h`, `asm/machine.h`.
- Detected declarations: `function __tlb_flush_local`, `function __tlb_flush_idte`, `function __tlb_flush_global`, `function CPUs`, `function __tlb_flush_kernel`, `function __tlb_flush_mm_lazy`, `function flush_tlb_all`, `function flush_tlb_range`, `function flush_tlb_kernel_range`.
- Atlas domain: Architecture Layer / arch/s390.
- Implementation status: source implementation candidate.
- Synchronization appears in or near this file; preserve lock ordering, sleepability, and interrupt-context constraints.
Implementation Notes
- This generated page is the file-by-file coverage layer; curated subsystem chapters should link here when they synthesize a multi-file control flow.
- Core OS pages should be promoted from atlas-only to deep-reviewed when they explain data structures, invariants, locking, lifecycle, and C implementation snippets.
- Driver-family pages are intentionally pattern-oriented unless they are part of the selected PCIe/NVMe representative device path.