arch/s390/pci/pci_fixup.c
Source file repositories/reference/linux-study-clean/arch/s390/pci/pci_fixup.c
File Facts
- System
- Linux kernel
- Corpus path
arch/s390/pci/pci_fixup.c- Extension
.c- Size
- 563 bytes
- Lines
- 24
- Domain
- Architecture Layer
- Bucket
- arch/s390
- Inferred role
- Architecture Layer: implementation source
- Status
- source implementation candidate
Why This File Exists
CPU and platform-specific kernel glue: boot entry, traps, syscall entry, interrupts, page tables, context switch, and low-level barriers.
- CPU and platform-specific kernel glue: boot entry, traps, syscall entry, interrupts, page tables, context switch, and low-level barriers.
- Defines or uses C structs; map object ownership, embedded links, reference counts, and lock ownership.
Dependency Surface
linux/pci.h
Detected Declarations
function Author
Annotated Snippet
// SPDX-License-Identifier: GPL-2.0
/*
* Exceptions for specific devices,
*
* Copyright IBM Corp. 2025
*
* Author(s):
* Niklas Schnelle <schnelle@linux.ibm.com>
*/
#include <linux/pci.h>
static void zpci_ism_bar_no_mmap(struct pci_dev *pdev)
{
/*
* ISM's BAR is special. Drivers written for ISM know
* how to handle this but others need to be aware of their
* special nature e.g. to prevent attempts to mmap() it.
*/
pdev->non_mappable_bars = 1;
}
DECLARE_PCI_FIXUP_EARLY(PCI_VENDOR_ID_IBM,
PCI_DEVICE_ID_IBM_ISM,
zpci_ism_bar_no_mmap);
Annotation
- Immediate include surface: `linux/pci.h`.
- Detected declarations: `function Author`.
- Atlas domain: Architecture Layer / arch/s390.
- Implementation status: source implementation candidate.
Implementation Notes
- This generated page is the file-by-file coverage layer; curated subsystem chapters should link here when they synthesize a multi-file control flow.
- Core OS pages should be promoted from atlas-only to deep-reviewed when they explain data structures, invariants, locking, lifecycle, and C implementation snippets.
- Driver-family pages are intentionally pattern-oriented unless they are part of the selected PCIe/NVMe representative device path.