arch/s390/pci/pci_insn.c
Source file repositories/reference/linux-study-clean/arch/s390/pci/pci_insn.c
File Facts
- System
- Linux kernel
- Corpus path
arch/s390/pci/pci_insn.c- Extension
.c- Size
- 10448 bytes
- Lines
- 454
- Domain
- Architecture Layer
- Bucket
- arch/s390
- Inferred role
- Architecture Layer: exported/initcall integration point
- Status
- integration implementation candidate
Why This File Exists
CPU and platform-specific kernel glue: boot entry, traps, syscall entry, interrupts, page tables, context switch, and low-level barriers.
- CPU and platform-specific kernel glue: boot entry, traps, syscall entry, interrupts, page tables, context switch, and low-level barriers.
- Exports symbols or registers init work; inspect boot/module ordering and who consumes the exported contract.
- Defines or uses C structs; map object ownership, embedded links, reference counts, and lock ownership.
Dependency Surface
linux/export.hlinux/errno.hlinux/delay.hlinux/jump_label.hasm/asm-extable.hasm/facility.hasm/pci_insn.hasm/pci_debug.hasm/pci_io.hasm/processor.hasm/asm.h
Detected Declarations
struct zpci_err_insn_datafunction zpci_err_insn_reqfunction zpci_err_insn_addrfunction __mpcifcfunction zpci_mod_fcfunction __rpcitfunction zpci_refresh_transfunction zpci_set_irq_ctrlfunction ____pcilgfunction __pcilgfunction __zpci_loadfunction zpci_load_fhfunction __pcilg_miofunction zpci_loadfunction __pcistgfunction __zpci_storefunction zpci_store_fhfunction __pcistg_miofunction zpci_storefunction __pcistbfunction __zpci_store_blockfunction zpci_write_block_fhfunction __pcistb_miofunction zpci_write_blockfunction __pciwb_miofunction zpci_barrierexport zpci_mod_fcexport zpci_set_irq_ctrlexport __zpci_loadexport zpci_loadexport __zpci_storeexport zpci_storeexport __zpci_store_blockexport zpci_write_blockexport zpci_barrier
Annotated Snippet
struct zpci_err_insn_data {
u8 insn;
u8 cc;
u8 status;
union {
struct {
u64 req;
u64 offset;
};
struct {
u64 addr;
u64 len;
};
};
} __packed;
static inline void zpci_err_insn_req(int lvl, u8 insn, u8 cc, u8 status,
u64 req, u64 offset)
{
struct zpci_err_insn_data data = {
.insn = insn, .cc = cc, .status = status,
.req = req, .offset = offset};
zpci_err_hex_level(lvl, &data, sizeof(data));
}
static inline void zpci_err_insn_addr(int lvl, u8 insn, u8 cc, u8 status,
u64 addr, u64 len)
{
struct zpci_err_insn_data data = {
.insn = insn, .cc = cc, .status = status,
.addr = addr, .len = len};
zpci_err_hex_level(lvl, &data, sizeof(data));
}
/* Modify PCI Function Controls */
static inline u8 __mpcifc(u64 req, struct zpci_fib *fib, u8 *status)
{
int cc;
asm volatile (
" .insn rxy,0xe300000000d0,%[req],%[fib]\n"
CC_IPM(cc)
: CC_OUT(cc, cc), [req] "+d" (req), [fib] "+Q" (*fib)
:
: CC_CLOBBER);
*status = req >> 24 & 0xff;
return CC_TRANSFORM(cc);
}
u8 zpci_mod_fc(u64 req, struct zpci_fib *fib, u8 *status)
{
bool retried = false;
u8 cc;
do {
cc = __mpcifc(req, fib, status);
if (cc == 2) {
msleep(ZPCI_INSN_BUSY_DELAY);
if (!retried) {
zpci_err_insn_req(1, 'M', cc, *status, req, 0);
retried = true;
}
}
} while (cc == 2);
if (cc)
zpci_err_insn_req(0, 'M', cc, *status, req, 0);
else if (retried)
zpci_err_insn_req(1, 'M', cc, *status, req, 0);
return cc;
}
EXPORT_SYMBOL_GPL(zpci_mod_fc);
/* Refresh PCI Translations */
static inline u8 __rpcit(u64 fn, u64 addr, u64 range, u8 *status)
{
union register_pair addr_range = {.even = addr, .odd = range};
int cc;
asm volatile (
" .insn rre,0xb9d30000,%[fn],%[addr_range]\n"
CC_IPM(cc)
: CC_OUT(cc, cc), [fn] "+d" (fn)
: [addr_range] "d" (addr_range.pair)
: CC_CLOBBER);
*status = fn >> 24 & 0xff;
return CC_TRANSFORM(cc);
Annotation
- Immediate include surface: `linux/export.h`, `linux/errno.h`, `linux/delay.h`, `linux/jump_label.h`, `asm/asm-extable.h`, `asm/facility.h`, `asm/pci_insn.h`, `asm/pci_debug.h`.
- Detected declarations: `struct zpci_err_insn_data`, `function zpci_err_insn_req`, `function zpci_err_insn_addr`, `function __mpcifc`, `function zpci_mod_fc`, `function __rpcit`, `function zpci_refresh_trans`, `function zpci_set_irq_ctrl`, `function ____pcilg`, `function __pcilg`.
- Atlas domain: Architecture Layer / arch/s390.
- Implementation status: integration implementation candidate.
Implementation Notes
- This generated page is the file-by-file coverage layer; curated subsystem chapters should link here when they synthesize a multi-file control flow.
- Core OS pages should be promoted from atlas-only to deep-reviewed when they explain data structures, invariants, locking, lifecycle, and C implementation snippets.
- Driver-family pages are intentionally pattern-oriented unless they are part of the selected PCIe/NVMe representative device path.