arch/sh/boards/board-espt.c

File Facts

System

Linux kernel

Corpus path

arch/sh/boards/board-espt.c

Extension

.c

Size

2436 bytes

Lines

106

Domain

Architecture Layer

Bucket

arch/sh

Inferred role

Architecture Layer: exported/initcall integration point

Status

integration implementation candidate

Why This File Exists

CPU and platform-specific kernel glue: boot entry, traps, syscall entry, interrupts, page tables, context switch, and low-level barriers.

• CPU and platform-specific kernel glue: boot entry, traps, syscall entry, interrupts, page tables, context switch, and low-level barriers.
• Exports symbols or registers init work; inspect boot/module ordering and who consumes the exported contract.
• Defines or uses C structs; map object ownership, embedded links, reference counts, and lock ownership.

Dependency Surface

• linux/init.h
• linux/platform_device.h
• linux/interrupt.h
• linux/mtd/physmap.h
• linux/io.h
• linux/sh_eth.h
• linux/sh_intc.h
• asm/machvec.h
• linux/sizes.h

Detected Declarations

• function espt_devices_setup
• module init espt_devices_setup

Annotated Snippet

device_initcall(espt_devices_setup);

static struct sh_machine_vector mv_espt __initmv = {
	.mv_name = "ESPT-GIGA",
};

Annotation

• Immediate include surface: `linux/init.h`, `linux/platform_device.h`, `linux/interrupt.h`, `linux/mtd/physmap.h`, `linux/io.h`, `linux/sh_eth.h`, `linux/sh_intc.h`, `asm/machvec.h`.
• Detected declarations: `function espt_devices_setup`, `module init espt_devices_setup`.
• Atlas domain: Architecture Layer / arch/sh.
• Implementation status: integration implementation candidate.

Implementation Notes

• This generated page is the file-by-file coverage layer; curated subsystem chapters should link here when they synthesize a multi-file control flow.
• Core OS pages should be promoted from atlas-only to deep-reviewed when they explain data structures, invariants, locking, lifecycle, and C implementation snippets.
• Driver-family pages are intentionally pattern-oriented unless they are part of the selected PCIe/NVMe representative device path.