arch/sh/boards/board-titan.c
Source file repositories/reference/linux-study-clean/arch/sh/boards/board-titan.c
File Facts
- System
- Linux kernel
- Corpus path
arch/sh/boards/board-titan.c- Extension
.c- Size
- 471 bytes
- Lines
- 22
- Domain
- Architecture Layer
- Bucket
- arch/sh
- Inferred role
- Architecture Layer: implementation source
- Status
- source implementation candidate
Why This File Exists
CPU and platform-specific kernel glue: boot entry, traps, syscall entry, interrupts, page tables, context switch, and low-level barriers.
- CPU and platform-specific kernel glue: boot entry, traps, syscall entry, interrupts, page tables, context switch, and low-level barriers.
- Defines or uses C structs; map object ownership, embedded links, reference counts, and lock ownership.
Dependency Surface
linux/init.hlinux/irq.hmach/titan.hasm/io.h
Detected Declarations
function Copyright
Annotated Snippet
// SPDX-License-Identifier: GPL-2.0
/*
* arch/sh/boards/titan/setup.c - Setup for Titan
*
* Copyright (C) 2006 Jamie Lenehan
*/
#include <linux/init.h>
#include <linux/irq.h>
#include <mach/titan.h>
#include <asm/io.h>
static void __init init_titan_irq(void)
{
/* enable individual interrupt mode for externals */
plat_irq_setup_pins(IRQ_MODE_IRQ);
}
static struct sh_machine_vector mv_titan __initmv = {
.mv_name = "Titan",
.mv_init_irq = init_titan_irq,
};
Annotation
- Immediate include surface: `linux/init.h`, `linux/irq.h`, `mach/titan.h`, `asm/io.h`.
- Detected declarations: `function Copyright`.
- Atlas domain: Architecture Layer / arch/sh.
- Implementation status: source implementation candidate.
Implementation Notes
- This generated page is the file-by-file coverage layer; curated subsystem chapters should link here when they synthesize a multi-file control flow.
- Core OS pages should be promoted from atlas-only to deep-reviewed when they explain data structures, invariants, locking, lifecycle, and C implementation snippets.
- Driver-family pages are intentionally pattern-oriented unless they are part of the selected PCIe/NVMe representative device path.