arch/sh/boards/mach-se/7722/irq.c
Source file repositories/reference/linux-study-clean/arch/sh/boards/mach-se/7722/irq.c
File Facts
- System
- Linux kernel
- Corpus path
arch/sh/boards/mach-se/7722/irq.c- Extension
.c- Size
- 2699 bytes
- Lines
- 117
- Domain
- Architecture Layer
- Bucket
- arch/sh
- Inferred role
- Architecture Layer: implementation source
- Status
- source implementation candidate
Why This File Exists
CPU and platform-specific kernel glue: boot entry, traps, syscall entry, interrupts, page tables, context switch, and low-level barriers.
- CPU and platform-specific kernel glue: boot entry, traps, syscall entry, interrupts, page tables, context switch, and low-level barriers.
- Defines or uses C structs; map object ownership, embedded links, reference counts, and lock ownership.
Dependency Surface
linux/init.hlinux/irq.hlinux/interrupt.hlinux/irqdomain.hlinux/io.hlinux/err.hlinux/sizes.hmach-se/mach/se7722.h
Detected Declarations
function se7722_irq_demuxfunction se7722_domain_initfunction se7722_gc_initfunction init_se7722_IRQ
Annotated Snippet
if (unlikely(irq == 0)) {
printk("Failed to allocate IRQ %d\n", i);
return;
}
}
}
static void __init se7722_gc_init(void)
{
struct irq_chip_generic *gc;
struct irq_chip_type *ct;
unsigned int irq_base;
irq_base = irq_find_mapping(se7722_irq_domain, 0);
gc = irq_alloc_generic_chip(DRV_NAME, 1, irq_base, se7722_irq_regs,
handle_level_irq);
if (unlikely(!gc))
return;
ct = gc->chip_types;
ct->chip.irq_mask = irq_gc_mask_set_bit;
ct->chip.irq_unmask = irq_gc_mask_clr_bit;
ct->regs.mask = IRQ01_MASK_REG;
irq_setup_generic_chip(gc, IRQ_MSK(SE7722_FPGA_IRQ_NR),
IRQ_GC_INIT_MASK_CACHE,
IRQ_NOREQUEST | IRQ_NOPROBE, 0);
irq_set_chained_handler(IRQ0_IRQ, se7722_irq_demux);
irq_set_irq_type(IRQ0_IRQ, IRQ_TYPE_LEVEL_LOW);
irq_set_chained_handler(IRQ1_IRQ, se7722_irq_demux);
irq_set_irq_type(IRQ1_IRQ, IRQ_TYPE_LEVEL_LOW);
}
/*
* Initialize FPGA IRQs
*/
void __init init_se7722_IRQ(void)
{
se7722_irq_regs = ioremap(IRQ01_BASE_ADDR, SZ_16);
if (unlikely(!se7722_irq_regs)) {
printk("Failed to remap IRQ01 regs\n");
return;
}
/*
* All FPGA IRQs disabled by default
*/
iowrite16(0, se7722_irq_regs + IRQ01_MASK_REG);
__raw_writew(0x2000, 0xb03fffec); /* mrshpc irq enable */
se7722_domain_init();
se7722_gc_init();
}
Annotation
- Immediate include surface: `linux/init.h`, `linux/irq.h`, `linux/interrupt.h`, `linux/irqdomain.h`, `linux/io.h`, `linux/err.h`, `linux/sizes.h`, `mach-se/mach/se7722.h`.
- Detected declarations: `function se7722_irq_demux`, `function se7722_domain_init`, `function se7722_gc_init`, `function init_se7722_IRQ`.
- Atlas domain: Architecture Layer / arch/sh.
- Implementation status: source implementation candidate.
Implementation Notes
- This generated page is the file-by-file coverage layer; curated subsystem chapters should link here when they synthesize a multi-file control flow.
- Core OS pages should be promoted from atlas-only to deep-reviewed when they explain data structures, invariants, locking, lifecycle, and C implementation snippets.
- Driver-family pages are intentionally pattern-oriented unless they are part of the selected PCIe/NVMe representative device path.