arch/sh/boot/dts/j2_mimas_v2.dts

Source file repositories/reference/linux-study-clean/arch/sh/boot/dts/j2_mimas_v2.dts

File Facts

System
Linux kernel
Corpus path
arch/sh/boot/dts/j2_mimas_v2.dts
Extension
.dts
Size
1672 bytes
Lines
98
Domain
Architecture Layer
Bucket
arch/sh
Inferred role
Architecture Layer: configuration, schema, or hardware description
Status
atlas-only

Why This File Exists

CPU and platform-specific kernel glue: boot entry, traps, syscall entry, interrupts, page tables, context switch, and low-level barriers.

Dependency Surface

Detected Declarations

Annotated Snippet

// SPDX-License-Identifier: GPL-2.0
/dts-v1/;

/ {
	compatible = "jcore,j2-soc";
	model = "J2 FPGA SoC on Mimas v2 board";

	#address-cells = <1>;
	#size-cells = <1>;

	interrupt-parent = <&aic>;

	cpus {
		#address-cells = <1>;
		#size-cells = <0>;

		cpu@0 {
			device_type = "cpu";
			compatible = "jcore,j2";
			reg = <0>;
			clock-frequency = <50000000>;
			d-cache-size = <8192>;
			i-cache-size = <8192>;
			d-cache-block-size = <16>;
			i-cache-block-size = <16>;
		};
	};

	memory@10000000 {
		device_type = "memory";
		reg = <0x10000000 0x4000000>;
	};

	aliases {
		serial0 = &uart0;
		spi0 = &spi0;
	};

	chosen {
		stdout-path = "serial0";
	};

	soc@abcd0000 {
		compatible = "simple-bus";
		ranges = <0 0xabcd0000 0x100000>;

		#address-cells = <1>;
		#size-cells = <1>;

		aic: interrupt-controller@200 {
			compatible = "jcore,aic1";
			reg = <0x200 0x10>;
			interrupt-controller;
			#interrupt-cells = <1>;
		};

		cache-controller@c0 {
			compatible = "jcore,cache";
			reg = <0xc0 4>;
		};

		timer@200 {
			compatible = "jcore,pit";
			reg = <0x200 0x30>;
			interrupts = <0x48>;
		};

		spi0: spi@40 {
			compatible = "jcore,spi2";

Annotation

Implementation Notes