arch/sh/include/asm/processor.h
Source file repositories/reference/linux-study-clean/arch/sh/include/asm/processor.h
File Facts
- System
- Linux kernel
- Corpus path
arch/sh/include/asm/processor.h- Extension
.h- Size
- 4319 bytes
- Lines
- 176
- Domain
- Architecture Layer
- Bucket
- arch/sh
- Inferred role
- Architecture Layer: implementation source
- Status
- source implementation candidate
Why This File Exists
CPU and platform-specific kernel glue: boot entry, traps, syscall entry, interrupts, page tables, context switch, and low-level barriers.
- CPU and platform-specific kernel glue: boot entry, traps, syscall entry, interrupts, page tables, context switch, and low-level barriers.
- Defines or uses C structs; map object ownership, embedded links, reference counts, and lock ownership.
Dependency Surface
asm/cpu-features.hasm/cache.hasm/processor_32.h
Detected Declarations
struct tlb_infostruct sh_cpuinfostruct seq_operationsstruct task_structenum cpu_typeenum cpu_family
Annotated Snippet
struct tlb_info {
unsigned long long next;
unsigned long long first;
unsigned long long last;
unsigned int entries;
unsigned int step;
unsigned long flags;
};
struct sh_cpuinfo {
unsigned int type, family;
int cut_major, cut_minor;
unsigned long loops_per_jiffy;
unsigned long asid_cache;
struct cache_info icache; /* Primary I-cache */
struct cache_info dcache; /* Primary D-cache */
struct cache_info scache; /* Secondary cache */
/* TLB info */
struct tlb_info itlb;
struct tlb_info dtlb;
unsigned int phys_bits;
unsigned long flags;
} __attribute__ ((aligned(L1_CACHE_BYTES)));
extern struct sh_cpuinfo cpu_data[];
#define boot_cpu_data cpu_data[0]
#define current_cpu_data cpu_data[smp_processor_id()]
#define raw_current_cpu_data cpu_data[raw_smp_processor_id()]
#define cpu_sleep() __asm__ __volatile__ ("sleep" : : : "memory")
#define cpu_relax() barrier()
void default_idle(void);
void stop_this_cpu(void *);
/* Forward decl */
struct seq_operations;
struct task_struct;
extern struct pt_regs fake_swapper_regs;
extern void cpu_init(void);
extern void cpu_probe(void);
/* arch/sh/kernel/process.c */
extern unsigned int xstate_size;
extern void free_thread_xstate(struct task_struct *);
extern struct kmem_cache *task_xstate_cachep;
/* arch/sh/mm/alignment.c */
extern int get_unalign_ctl(struct task_struct *, unsigned long addr);
extern int set_unalign_ctl(struct task_struct *, unsigned int val);
#define GET_UNALIGN_CTL(tsk, addr) get_unalign_ctl((tsk), (addr))
#define SET_UNALIGN_CTL(tsk, val) set_unalign_ctl((tsk), (val))
/* arch/sh/mm/init.c */
extern unsigned int mem_init_done;
/* arch/sh/kernel/setup.c */
const char *get_cpu_subtype(struct sh_cpuinfo *c);
extern const struct seq_operations cpuinfo_op;
/* thread_struct flags */
#define SH_THREAD_UAC_NOPRINT (1 << 0)
#define SH_THREAD_UAC_SIGBUS (1 << 1)
#define SH_THREAD_UAC_MASK (SH_THREAD_UAC_NOPRINT | SH_THREAD_UAC_SIGBUS)
/* processor boot mode configuration */
#define MODE_PIN0 (1 << 0)
#define MODE_PIN1 (1 << 1)
#define MODE_PIN2 (1 << 2)
#define MODE_PIN3 (1 << 3)
#define MODE_PIN4 (1 << 4)
#define MODE_PIN5 (1 << 5)
#define MODE_PIN6 (1 << 6)
#define MODE_PIN7 (1 << 7)
#define MODE_PIN8 (1 << 8)
#define MODE_PIN9 (1 << 9)
#define MODE_PIN10 (1 << 10)
#define MODE_PIN11 (1 << 11)
#define MODE_PIN12 (1 << 12)
#define MODE_PIN13 (1 << 13)
#define MODE_PIN14 (1 << 14)
#define MODE_PIN15 (1 << 15)
Annotation
- Immediate include surface: `asm/cpu-features.h`, `asm/cache.h`, `asm/processor_32.h`.
- Detected declarations: `struct tlb_info`, `struct sh_cpuinfo`, `struct seq_operations`, `struct task_struct`, `enum cpu_type`, `enum cpu_family`.
- Atlas domain: Architecture Layer / arch/sh.
- Implementation status: source implementation candidate.
Implementation Notes
- This generated page is the file-by-file coverage layer; curated subsystem chapters should link here when they synthesize a multi-file control flow.
- Core OS pages should be promoted from atlas-only to deep-reviewed when they explain data structures, invariants, locking, lifecycle, and C implementation snippets.
- Driver-family pages are intentionally pattern-oriented unless they are part of the selected PCIe/NVMe representative device path.