arch/sh/include/asm/switch_to_32.h
Source file repositories/reference/linux-study-clean/arch/sh/include/asm/switch_to_32.h
File Facts
- System
- Linux kernel
- Corpus path
arch/sh/include/asm/switch_to_32.h- Extension
.h- Size
- 3631 bytes
- Lines
- 132
- Domain
- Architecture Layer
- Bucket
- arch/sh
- Inferred role
- Architecture Layer: implementation source
- Status
- source implementation candidate
Why This File Exists
CPU and platform-specific kernel glue: boot entry, traps, syscall entry, interrupts, page tables, context switch, and low-level barriers.
- CPU and platform-specific kernel glue: boot entry, traps, syscall entry, interrupts, page tables, context switch, and low-level barriers.
- Defines or uses C structs; map object ownership, embedded links, reference counts, and lock ownership.
Dependency Surface
- No C-style include directives detected by the generator.
Detected Declarations
- No top-level syscall, struct, function, initcall, or export declaration detected by the generator.
Annotated Snippet
#ifndef __ASM_SH_SWITCH_TO_32_H
#define __ASM_SH_SWITCH_TO_32_H
#ifdef CONFIG_SH_DSP
#define is_dsp_enabled(tsk) \
(!!(tsk->thread.dsp_status.status & SR_DSP))
#define __restore_dsp(tsk) \
do { \
register u32 *__ts2 __asm__ ("r2") = \
(u32 *)&tsk->thread.dsp_status; \
__asm__ __volatile__ ( \
".balign 4\n\t" \
"movs.l @r2+, a0\n\t" \
"movs.l @r2+, a1\n\t" \
"movs.l @r2+, a0g\n\t" \
"movs.l @r2+, a1g\n\t" \
"movs.l @r2+, m0\n\t" \
"movs.l @r2+, m1\n\t" \
"movs.l @r2+, x0\n\t" \
"movs.l @r2+, x1\n\t" \
"movs.l @r2+, y0\n\t" \
"movs.l @r2+, y1\n\t" \
"lds.l @r2+, dsr\n\t" \
"ldc.l @r2+, rs\n\t" \
"ldc.l @r2+, re\n\t" \
"ldc.l @r2+, mod\n\t" \
: : "r" (__ts2)); \
} while (0)
#define __save_dsp(tsk) \
do { \
register u32 *__ts2 __asm__ ("r2") = \
(u32 *)&tsk->thread.dsp_status + 14; \
\
__asm__ __volatile__ ( \
".balign 4\n\t" \
"stc.l mod, @-r2\n\t" \
"stc.l re, @-r2\n\t" \
"stc.l rs, @-r2\n\t" \
"sts.l dsr, @-r2\n\t" \
"movs.l y1, @-r2\n\t" \
"movs.l y0, @-r2\n\t" \
"movs.l x1, @-r2\n\t" \
"movs.l x0, @-r2\n\t" \
"movs.l m1, @-r2\n\t" \
"movs.l m0, @-r2\n\t" \
"movs.l a1g, @-r2\n\t" \
"movs.l a0g, @-r2\n\t" \
"movs.l a1, @-r2\n\t" \
"movs.l a0, @-r2\n\t" \
: : "r" (__ts2)); \
} while (0)
#else
#define is_dsp_enabled(tsk) (0)
#define __save_dsp(tsk) do { } while (0)
#define __restore_dsp(tsk) do { } while (0)
#endif
struct task_struct *__switch_to(struct task_struct *prev,
struct task_struct *next);
/*
* switch_to() should switch tasks to task nr n, first
*/
#define switch_to(prev, next, last) \
do { \
register u32 *__ts1 __asm__ ("r1"); \
register u32 *__ts2 __asm__ ("r2"); \
register u32 *__ts4 __asm__ ("r4"); \
register u32 *__ts5 __asm__ ("r5"); \
register u32 *__ts6 __asm__ ("r6"); \
register u32 __ts7 __asm__ ("r7"); \
struct task_struct *__last; \
\
if (is_dsp_enabled(prev)) \
__save_dsp(prev); \
if (is_dsp_enabled(next)) \
__restore_dsp(next); \
\
__ts1 = (u32 *)&prev->thread.sp; \
__ts2 = (u32 *)&prev->thread.pc; \
__ts4 = (u32 *)prev; \
__ts5 = (u32 *)next; \
__ts6 = (u32 *)&next->thread.sp; \
__ts7 = next->thread.pc; \
\
Annotation
- Atlas domain: Architecture Layer / arch/sh.
- Implementation status: source implementation candidate.
Implementation Notes
- This generated page is the file-by-file coverage layer; curated subsystem chapters should link here when they synthesize a multi-file control flow.
- Core OS pages should be promoted from atlas-only to deep-reviewed when they explain data structures, invariants, locking, lifecycle, and C implementation snippets.
- Driver-family pages are intentionally pattern-oriented unless they are part of the selected PCIe/NVMe representative device path.