arch/sh/include/mach-common/mach/lboxre2.h
Source file repositories/reference/linux-study-clean/arch/sh/include/mach-common/mach/lboxre2.h
File Facts
- System
- Linux kernel
- Corpus path
arch/sh/include/mach-common/mach/lboxre2.h- Extension
.h- Size
- 586 bytes
- Lines
- 25
- Domain
- Architecture Layer
- Bucket
- arch/sh
- Inferred role
- Architecture Layer: implementation source
- Status
- source implementation candidate
Why This File Exists
CPU and platform-specific kernel glue: boot entry, traps, syscall entry, interrupts, page tables, context switch, and low-level barriers.
- CPU and platform-specific kernel glue: boot entry, traps, syscall entry, interrupts, page tables, context switch, and low-level barriers.
Dependency Surface
linux/sh_intc.hasm/io_generic.h
Detected Declarations
- No top-level syscall, struct, function, initcall, or export declaration detected by the generator.
Annotated Snippet
#ifndef __ASM_SH_LBOXRE2_H
#define __ASM_SH_LBOXRE2_H
/*
* Copyright (C) 2007 Nobuhiro Iwamatsu
*
* NTT COMWARE L-BOX RE2 support
*/
#include <linux/sh_intc.h>
#define IRQ_CF1 evt2irq(0x320) /* CF1 */
#define IRQ_CF0 evt2irq(0x340) /* CF0 */
#define IRQ_INTD evt2irq(0x360) /* INTD */
#define IRQ_ETH1 evt2irq(0x380) /* Ether1 */
#define IRQ_ETH0 evt2irq(0x3a0) /* Ether0 */
#define IRQ_INTA evt2irq(0x3c0) /* INTA */
void init_lboxre2_IRQ(void);
#define __IO_PREFIX lboxre2
#include <asm/io_generic.h>
#endif /* __ASM_SH_LBOXRE2_H */
Annotation
- Immediate include surface: `linux/sh_intc.h`, `asm/io_generic.h`.
- Atlas domain: Architecture Layer / arch/sh.
- Implementation status: source implementation candidate.
Implementation Notes
- This generated page is the file-by-file coverage layer; curated subsystem chapters should link here when they synthesize a multi-file control flow.
- Core OS pages should be promoted from atlas-only to deep-reviewed when they explain data structures, invariants, locking, lifecycle, and C implementation snippets.
- Driver-family pages are intentionally pattern-oriented unless they are part of the selected PCIe/NVMe representative device path.