arch/sh/include/mach-kfr2r09/mach/partner-jet-setup.txt

File Facts

System

Linux kernel

Corpus path

arch/sh/include/mach-kfr2r09/mach/partner-jet-setup.txt

Extension

.txt

Size

3138 bytes

Lines

145

Domain

Architecture Layer

Bucket

arch/sh

Inferred role

Architecture Layer: documentation

Status

atlas-only

Why This File Exists

CPU and platform-specific kernel glue: boot entry, traps, syscall entry, interrupts, page tables, context switch, and low-level barriers.

• CPU and platform-specific kernel glue: boot entry, traps, syscall entry, interrupts, page tables, context switch, and low-level barriers.

Dependency Surface

• No C-style include directives detected by the generator.

Detected Declarations

• No top-level syscall, struct, function, initcall, or export declaration detected by the generator.

Annotated Snippet

LIST "SPDX-License-Identifier: GPL-2.0"
LIST "partner-jet-setup.txt - 20090729 Magnus Damm"
LIST "set up enough of the kfr2r09 hardware to boot the kernel"

LIST "zImage (RAM boot)"
LIST "This script can be used to boot the kernel from RAM via JTAG:"
LIST "> < partner-jet-setup.txt"
LIST "> RD zImage, 0xa8800000"
LIST "> G=0xa8800000"

LIST "romImage (Flash boot)"
LIST "Use the following command to burn the zImage to flash via JTAG:"
LIST "> RD romImage, 0"

LIST "--------------------------------"

LIST "disable watchdog"
EW 0xa4520004, 0xa507

LIST "invalidate instruction cache"
ED 0xff00001c, 0x00000800

LIST "invalidate TLBs"
ED 0xff000010, 0x00000004

LIST "select mode for cs5 + cs6"
ED 0xff800020, 0xa5a50001
ED 0xfec10000, 0x0000001b

LIST "setup clocks"
LIST "The PLL and FLL values are updated here for the optimal"
LIST "RF frequency and improved reception sensitivity."
ED 0xa4150004, 0x00000050
ED 0xa4150000, 0x91053508
WAIT 1
ED 0xa4150050, 0x00000340
ED 0xa4150024, 0x00005000

LIST "setup pins"
EB 0xa4050120, 0x00
EB 0xa4050122, 0x00
EB 0xa4050124, 0x00
EB 0xa4050126, 0x00
EB 0xa4050128, 0xA0
EB 0xa405012A, 0x10
EB 0xa405012C, 0x00
EB 0xa405012E, 0x00
EB 0xa4050130, 0x00
EB 0xa4050132, 0x00
EB 0xa4050134, 0x01
EB 0xa4050136, 0x40
EB 0xa4050138, 0x00
EB 0xa405013A, 0x00
EB 0xa405013C, 0x00
EB 0xa405013E, 0x20
EB 0xa4050160, 0x00
EB 0xa4050162, 0x40
EB 0xa4050164, 0x03
EB 0xa4050166, 0x00
EB 0xa4050168, 0x00
EB 0xa405016A, 0x00
EB 0xa405016C, 0x00

EW 0xa405014E, 0x5660
EW 0xa4050150, 0x0145
EW 0xa4050152, 0x1550
EW 0xa4050154, 0x0200
EW 0xa4050156, 0x0040

EW 0xa4050158, 0x0000

Annotation

• Atlas domain: Architecture Layer / arch/sh.
• Implementation status: atlas-only.

Implementation Notes

• This generated page is the file-by-file coverage layer; curated subsystem chapters should link here when they synthesize a multi-file control flow.
• Core OS pages should be promoted from atlas-only to deep-reviewed when they explain data structures, invariants, locking, lifecycle, and C implementation snippets.
• Driver-family pages are intentionally pattern-oriented unless they are part of the selected PCIe/NVMe representative device path.