arch/sh/include/mach-kfr2r09/mach/romimage.h
Source file repositories/reference/linux-study-clean/arch/sh/include/mach-kfr2r09/mach/romimage.h
File Facts
- System
- Linux kernel
- Corpus path
arch/sh/include/mach-kfr2r09/mach/romimage.h- Extension
.h- Size
- 571 bytes
- Lines
- 32
- Domain
- Architecture Layer
- Bucket
- arch/sh
- Inferred role
- Architecture Layer: implementation source
- Status
- source implementation candidate
Why This File Exists
CPU and platform-specific kernel glue: boot entry, traps, syscall entry, interrupts, page tables, context switch, and low-level barriers.
- CPU and platform-specific kernel glue: boot entry, traps, syscall entry, interrupts, page tables, context switch, and low-level barriers.
Dependency Surface
asm/romimage-macros.hmach/partner-jet-setup.txt
Detected Declarations
function mmcif_update_progress
Annotated Snippet
#ifdef __ASSEMBLER__
/* kfr2r09 board specific boot code:
* converts the "partner-jet-script.txt" script into assembly
* the assembly code is the first code to be executed in the romImage
*/
#include <asm/romimage-macros.h>
#include <mach/partner-jet-setup.txt>
/* execute icbi after enabling cache */
mov.l 1f, r0
icbi @r0
/* jump to cached area */
mova 2f, r0
jmp @r0
nop
.align 2
1: .long 0xa8000000
2:
#else /* __ASSEMBLER__ */
static inline void mmcif_update_progress(int nr)
{
}
#endif /* __ASSEMBLER__ */
Annotation
- Immediate include surface: `asm/romimage-macros.h`, `mach/partner-jet-setup.txt`.
- Detected declarations: `function mmcif_update_progress`.
- Atlas domain: Architecture Layer / arch/sh.
- Implementation status: source implementation candidate.
Implementation Notes
- This generated page is the file-by-file coverage layer; curated subsystem chapters should link here when they synthesize a multi-file control flow.
- Core OS pages should be promoted from atlas-only to deep-reviewed when they explain data structures, invariants, locking, lifecycle, and C implementation snippets.
- Driver-family pages are intentionally pattern-oriented unless they are part of the selected PCIe/NVMe representative device path.