arch/sh/kernel/cpu/sh4a/setup-shx3.c
Source file repositories/reference/linux-study-clean/arch/sh/kernel/cpu/sh4a/setup-shx3.c
File Facts
- System
- Linux kernel
- Corpus path
arch/sh/kernel/cpu/sh4a/setup-shx3.c- Extension
.c- Size
- 12552 bytes
- Lines
- 397
- Domain
- Architecture Layer
- Bucket
- arch/sh
- Inferred role
- Architecture Layer: implementation source
- Status
- source implementation candidate
Why This File Exists
CPU and platform-specific kernel glue: boot entry, traps, syscall entry, interrupts, page tables, context switch, and low-level barriers.
- CPU and platform-specific kernel glue: boot entry, traps, syscall entry, interrupts, page tables, context switch, and low-level barriers.
- Defines or uses C structs; map object ownership, embedded links, reference counts, and lock ownership.
Dependency Surface
linux/platform_device.hlinux/init.hlinux/serial.hlinux/serial_sci.hlinux/io.hlinux/gpio.hlinux/sh_timer.hlinux/sh_intc.hcpu/shx3.hasm/mmzone.hasm/platform_early.h
Detected Declarations
function shx3_devices_setupfunction plat_early_device_setupfunction plat_irq_setup_pinsfunction plat_irq_setupfunction plat_mem_setup
Annotated Snippet
if (unlikely(ret)) {
pr_err("Failed to set IRQ mode\n");
return;
}
register_intc_controller(&intc_desc_irq);
break;
case IRQ_MODE_IRL3210:
ret |= gpio_request(GPIO_FN_IRL3, intc_desc_irl.name);
ret |= gpio_request(GPIO_FN_IRL2, intc_desc_irl.name);
ret |= gpio_request(GPIO_FN_IRL1, intc_desc_irl.name);
ret |= gpio_request(GPIO_FN_IRL0, intc_desc_irl.name);
if (unlikely(ret)) {
pr_err("Failed to set IRL mode\n");
return;
}
register_intc_controller(&intc_desc_irl);
break;
default:
BUG();
}
}
void __init plat_irq_setup(void)
{
register_intc_controller(&intc_desc);
}
void __init plat_mem_setup(void)
{
unsigned int nid = 1;
/* Register CPU#0 URAM space as Node 1 */
setup_bootmem_node(nid++, 0x145f0000, 0x14610000); /* CPU0 */
#if 0
/* XXX: Not yet.. */
setup_bootmem_node(nid++, 0x14df0000, 0x14e10000); /* CPU1 */
setup_bootmem_node(nid++, 0x155f0000, 0x15610000); /* CPU2 */
setup_bootmem_node(nid++, 0x15df0000, 0x15e10000); /* CPU3 */
#endif
setup_bootmem_node(nid++, 0x16000000, 0x16020000); /* CSM */
}
Annotation
- Immediate include surface: `linux/platform_device.h`, `linux/init.h`, `linux/serial.h`, `linux/serial_sci.h`, `linux/io.h`, `linux/gpio.h`, `linux/sh_timer.h`, `linux/sh_intc.h`.
- Detected declarations: `function shx3_devices_setup`, `function plat_early_device_setup`, `function plat_irq_setup_pins`, `function plat_irq_setup`, `function plat_mem_setup`.
- Atlas domain: Architecture Layer / arch/sh.
- Implementation status: source implementation candidate.
Implementation Notes
- This generated page is the file-by-file coverage layer; curated subsystem chapters should link here when they synthesize a multi-file control flow.
- Core OS pages should be promoted from atlas-only to deep-reviewed when they explain data structures, invariants, locking, lifecycle, and C implementation snippets.
- Driver-family pages are intentionally pattern-oriented unless they are part of the selected PCIe/NVMe representative device path.