arch/sh/mm/cache-j2.c
Source file repositories/reference/linux-study-clean/arch/sh/mm/cache-j2.c
File Facts
- System
- Linux kernel
- Corpus path
arch/sh/mm/cache-j2.c- Extension
.c- Size
- 1543 bytes
- Lines
- 65
- Domain
- Architecture Layer
- Bucket
- arch/sh
- Inferred role
- Architecture Layer: implementation source
- Status
- source implementation candidate
Why This File Exists
CPU and platform-specific kernel glue: boot entry, traps, syscall entry, interrupts, page tables, context switch, and low-level barriers.
- CPU and platform-specific kernel glue: boot entry, traps, syscall entry, interrupts, page tables, context switch, and low-level barriers.
Dependency Surface
linux/init.hlinux/mm.hlinux/cpumask.hasm/cache.hasm/addrspace.hasm/processor.hasm/cacheflush.hasm/io.h
Detected Declarations
function j2_flush_icachefunction j2_flush_dcachefunction j2_flush_bothfunction j2_cache_init
Annotated Snippet
// SPDX-License-Identifier: GPL-2.0-only
/*
* arch/sh/mm/cache-j2.c
*
* Copyright (C) 2015-2016 Smart Energy Instruments, Inc.
*/
#include <linux/init.h>
#include <linux/mm.h>
#include <linux/cpumask.h>
#include <asm/cache.h>
#include <asm/addrspace.h>
#include <asm/processor.h>
#include <asm/cacheflush.h>
#include <asm/io.h>
#define ICACHE_ENABLE 0x1
#define DCACHE_ENABLE 0x2
#define CACHE_ENABLE (ICACHE_ENABLE | DCACHE_ENABLE)
#define ICACHE_FLUSH 0x100
#define DCACHE_FLUSH 0x200
#define CACHE_FLUSH (ICACHE_FLUSH | DCACHE_FLUSH)
u32 __iomem *j2_ccr_base;
static void j2_flush_icache(void *args)
{
unsigned cpu;
for_each_possible_cpu(cpu)
__raw_writel(CACHE_ENABLE | ICACHE_FLUSH, j2_ccr_base + cpu);
}
static void j2_flush_dcache(void *args)
{
unsigned cpu;
for_each_possible_cpu(cpu)
__raw_writel(CACHE_ENABLE | DCACHE_FLUSH, j2_ccr_base + cpu);
}
static void j2_flush_both(void *args)
{
unsigned cpu;
for_each_possible_cpu(cpu)
__raw_writel(CACHE_ENABLE | CACHE_FLUSH, j2_ccr_base + cpu);
}
void __init j2_cache_init(void)
{
if (!j2_ccr_base)
return;
local_flush_cache_all = j2_flush_both;
local_flush_cache_mm = j2_flush_both;
local_flush_cache_dup_mm = j2_flush_both;
local_flush_cache_page = j2_flush_both;
local_flush_cache_range = j2_flush_both;
local_flush_dcache_folio = j2_flush_dcache;
local_flush_icache_range = j2_flush_icache;
local_flush_icache_folio = j2_flush_icache;
local_flush_cache_sigtramp = j2_flush_icache;
pr_info("Initial J2 CCR is %.8x\n", __raw_readl(j2_ccr_base));
}
Annotation
- Immediate include surface: `linux/init.h`, `linux/mm.h`, `linux/cpumask.h`, `asm/cache.h`, `asm/addrspace.h`, `asm/processor.h`, `asm/cacheflush.h`, `asm/io.h`.
- Detected declarations: `function j2_flush_icache`, `function j2_flush_dcache`, `function j2_flush_both`, `function j2_cache_init`.
- Atlas domain: Architecture Layer / arch/sh.
- Implementation status: source implementation candidate.
Implementation Notes
- This generated page is the file-by-file coverage layer; curated subsystem chapters should link here when they synthesize a multi-file control flow.
- Core OS pages should be promoted from atlas-only to deep-reviewed when they explain data structures, invariants, locking, lifecycle, and C implementation snippets.
- Driver-family pages are intentionally pattern-oriented unless they are part of the selected PCIe/NVMe representative device path.