arch/sparc/include/asm/bbc.h

Source file repositories/reference/linux-study-clean/arch/sparc/include/asm/bbc.h

File Facts

System
Linux kernel
Corpus path
arch/sparc/include/asm/bbc.h
Extension
.h
Size
9996 bytes
Lines
227
Domain
Architecture Layer
Bucket
arch/sparc
Inferred role
Architecture Layer: implementation source
Status
source implementation candidate

Why This File Exists

CPU and platform-specific kernel glue: boot entry, traps, syscall entry, interrupts, page tables, context switch, and low-level barriers.

Dependency Surface

Detected Declarations

Annotated Snippet

#ifndef _SPARC64_BBC_H
#define _SPARC64_BBC_H

/* Register sizes are indicated by "B" (Byte, 1-byte),
 * "H" (Half-word, 2 bytes), "W" (Word, 4 bytes) or
 * "Q" (Quad, 8 bytes) inside brackets.
 */

#define BBC_AID		0x00	/* [B] Agent ID			*/
#define BBC_DEVP	0x01	/* [B] Device Present		*/
#define BBC_ARB		0x02	/* [B] Arbitration		*/
#define BBC_QUIESCE	0x03	/* [B] Quiesce			*/
#define BBC_WDACTION	0x04	/* [B] Watchdog Action		*/
#define BBC_SPG		0x06	/* [B] Soft POR Gen		*/
#define BBC_SXG		0x07	/* [B] Soft XIR Gen		*/
#define BBC_PSRC	0x08	/* [W] POR Source		*/
#define BBC_XSRC	0x0c	/* [B] XIR Source		*/
#define BBC_CSC		0x0d	/* [B] Clock Synthesizers Control*/
#define BBC_ES_CTRL	0x0e	/* [H] Energy Star Control	*/
#define BBC_ES_ACT	0x10	/* [W] E* Assert Change Time	*/
#define BBC_ES_DACT	0x14	/* [B] E* De-Assert Change Time	*/
#define BBC_ES_DABT	0x15	/* [B] E* De-Assert Bypass Time	*/
#define BBC_ES_ABT	0x16	/* [H] E* Assert Bypass Time	*/
#define BBC_ES_PST	0x18	/* [W] E* PLL Settle Time	*/
#define BBC_ES_FSL	0x1c	/* [W] E* Frequency Switch Latency*/
#define BBC_EBUST	0x20	/* [Q] EBUS Timing		*/
#define BBC_JTAG_CMD	0x28	/* [W] JTAG+ Command		*/
#define BBC_JTAG_CTRL	0x2c	/* [B] JTAG+ Control		*/
#define BBC_I2C_SEL	0x2d	/* [B] I2C Selection		*/
#define BBC_I2C_0_S1	0x2e	/* [B] I2C ctrlr-0 reg S1	*/
#define BBC_I2C_0_S0	0x2f	/* [B] I2C ctrlr-0 regs S0,S0',S2,S3*/
#define BBC_I2C_1_S1	0x30	/* [B] I2C ctrlr-1 reg S1	*/
#define BBC_I2C_1_S0	0x31	/* [B] I2C ctrlr-1 regs S0,S0',S2,S3*/
#define BBC_KBD_BEEP	0x32	/* [B] Keyboard Beep		*/
#define BBC_KBD_BCNT	0x34	/* [W] Keyboard Beep Counter	*/

#define BBC_REGS_SIZE	0x40

/* There is a 2K scratch ram area at offset 0x80000 but I doubt
 * we will use it for anything.
 */

/* Agent ID register.  This register shows the Safari Agent ID
 * for the processors.  The value returned depends upon which
 * cpu is reading the register.
 */
#define BBC_AID_ID	0x07	/* Safari ID		*/
#define BBC_AID_RESV	0xf8	/* Reserved		*/

/* Device Present register.  One can determine which cpus are actually
 * present in the machine by interrogating this register.
 */
#define BBC_DEVP_CPU0	0x01	/* Processor 0 present	*/
#define BBC_DEVP_CPU1	0x02	/* Processor 1 present	*/
#define BBC_DEVP_CPU2	0x04	/* Processor 2 present	*/
#define BBC_DEVP_CPU3	0x08	/* Processor 3 present	*/
#define BBC_DEVP_RESV	0xf0	/* Reserved		*/

/* Arbitration register.  This register is used to block access to
 * the BBC from a particular cpu.
 */
#define BBC_ARB_CPU0	0x01	/* Enable cpu 0 BBC arbitratrion */
#define BBC_ARB_CPU1	0x02	/* Enable cpu 1 BBC arbitratrion */
#define BBC_ARB_CPU2	0x04	/* Enable cpu 2 BBC arbitratrion */
#define BBC_ARB_CPU3	0x08	/* Enable cpu 3 BBC arbitratrion */
#define BBC_ARB_RESV	0xf0	/* Reserved			 */

/* Quiesce register.  Bus and BBC segments for cpus can be disabled
 * with this register, ie. for hot plugging.
 */
#define BBC_QUIESCE_S02	0x01	/* Quiesce Safari segment for cpu 0 and 2 */
#define BBC_QUIESCE_S13	0x02	/* Quiesce Safari segment for cpu 1 and 3 */
#define BBC_QUIESCE_B02	0x04	/* Quiesce BBC segment for cpu 0 and 2    */
#define BBC_QUIESCE_B13	0x08	/* Quiesce BBC segment for cpu 1 and 3    */
#define BBC_QUIESCE_FD0 0x10	/* Disable Fatal_Error[0] reporting	  */
#define BBC_QUIESCE_FD1 0x20	/* Disable Fatal_Error[1] reporting	  */
#define BBC_QUIESCE_FD2 0x40	/* Disable Fatal_Error[2] reporting	  */
#define BBC_QUIESCE_FD3 0x80	/* Disable Fatal_Error[3] reporting	  */

/* Watchdog Action register.  When the watchdog device timer expires
 * a line is enabled to the BBC.  The action BBC takes when this line
 * is asserted can be controlled by this regiser.
 */
#define BBC_WDACTION_RST  0x01	/* When set, watchdog causes system reset.
				 * When clear, BBC ignores watchdog signal.
				 */
#define BBC_WDACTION_RESV 0xfe	/* Reserved */

/* Soft_POR_GEN register.  The POR (Power On Reset) signal may be asserted
 * for specific processors or all processors via this register.

Annotation

Implementation Notes